CD4026 counter reset issue

[AnalogKid]

The View attachment 98732 shows the INH and RST going to ground, without the resistor. that's the issue?

Yes. Connecting two inputs together to ground and tying two inputs together to anything else are two very different things. Remember that a schematic usually is not a physical layout or pc board routing plan. A ground connection daisy-chaining to a bunch of pins does not mean that those pins should be connected together in that order for all applications.

If you look at the 4026 internal logic diagram on the datasheet, you will see that the clock and inhibit are two inputs into an AND gate, one of them inverted. So in fact you can advance the counter with a positive edge on the clock pin with the inhibit grounded, or you can use a negative edge on the inhibit pin with the clock pin tied to Vdd. Both inputs are Schmidt trigger inputs, and this clearly signals the intent of the designers.

ak

 

[anilerenn]

Hi Mike,
I misunderstood the question. I thought it was the least significant digit that went to 1. You talk about two digits but you schematic shows three digits. It would be interesting to know how the third digit behaves. I still think the problem is related to the clock inhibit being connected to the reset line. What is the reason for connecting it this way ? I have just had another look at the timing diagrams on the data sheet and I now understand what is happening. In state 0 (The reset state.) the carry out pin is high. This is connected to the clock input of the next stage. This means that the counter now sees the 0 to 1 transition of the clock inhibit as a clock pulse. If you have to have the clock inhibit connected to the reset pin then the only solution I can see is to differentiate the carry out signal before connecting it to the clock input of the next stage. Connect the carry out to the clock of the next stage via a capacitor and connect the clock pin to ground via a resistor. The values will depend on how fast you are clocking the counter. I would try a 1 nF capacitor and a 10 k resistor. (I am assuming you are clocking it at less than a few tens of KHZ.)

Les.

Thank you so much it worked.