Anniyan_x
Member
hi i have timer1 as the time base for CCP1 and CPP2 module and the CCP module are configured in compare mode, generate software interrupts only.
the timer1 is also configured in timer overflow interrupt mode.
1)if i disable the CCP1 and CCP2 interrupts, the timer overflow interrupts is working fine.
2)CCP1 and CCP2 both are working fine if either one of teh module interrupts is disable and the timer1 interuppts also disable.
but if all the interrupts are enable, the program goes wrongly.
as per my understanding, i set CCP1 to a value, let say A, and CCP2 to another value, let say B and configured it to compare match mode with timer1, and timer overflow interrupts is also enabled. CCP are high priority and timer1 overflow is low priority. so when first match occurs in CCP1 module, a interrupts should generate and then timer continues counting and when the second match occures in CCP2, another interrupts should generate, and timer1 continues counting untill it overflow and the timer1 overflow interrupts is generated. the flow is not as above, timer1 interrupts get missed i guess, and the CCP2 interrupts is always generated
the timer1 is also configured in timer overflow interrupt mode.
1)if i disable the CCP1 and CCP2 interrupts, the timer overflow interrupts is working fine.
2)CCP1 and CCP2 both are working fine if either one of teh module interrupts is disable and the timer1 interuppts also disable.
but if all the interrupts are enable, the program goes wrongly.
as per my understanding, i set CCP1 to a value, let say A, and CCP2 to another value, let say B and configured it to compare match mode with timer1, and timer overflow interrupts is also enabled. CCP are high priority and timer1 overflow is low priority. so when first match occurs in CCP1 module, a interrupts should generate and then timer continues counting and when the second match occures in CCP2, another interrupts should generate, and timer1 continues counting untill it overflow and the timer1 overflow interrupts is generated. the flow is not as above, timer1 interrupts get missed i guess, and the CCP2 interrupts is always generated