#### AceOfHearts

##### New Member

Here is a common delay loop in assembly language:

DELAY: MOV R5, #7

HERE1: MOV R4, #255

HERE2: MOV R3, #255

HERE3: DJNZ R3, HERE3

DJNZ R4, HERE2

DJNZ R5, HERE1

RET

Let us assume the crystal frequecy is 11.0592MHz. 8051 uses 1/12 of oscilator frequency, which is 921.6kHz

Each oscilator cycle's time period becomes 1/f = 1/921.6kHz = 1.085uS

If we follow through the above loop, and if I understood correct, then the total time spent in the DELAY loop above is as follows:

255 + (255 * 255) + (255 * 255 * 7) * 1.085uS = 0.56S

HOWEVER, looking at a datasheet, i can see that the 8051 spends two cycles per DJNZ mnemonic, not one as I am assuming.

This will drastically affect the anticipated delay calculation.

Any input?

Thanks