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body terminal of mosfet

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PG1995

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Hi,

I've always understood that for an NMOS the drain should be at higher potential compared to the source; in other words, Vdd should be connected to the drain terminal and source terminal should be grounded for proper function. Vgs should be greater than or equal to Vtn

In case of PMOS, the source terminal should be at higher potential compared to the source, and Vgs should be less than or equal to Vtp, or Vsg should be equal to or greater than Vtp.

1647589127437.png

Source: https://www.digikey.com/en/articles/the-significance-of-the-intrinsic-body-diodes-inside-mosfets

Current typically flows from the drain to the source in N-channel FET applications because of the body diode polarity. Even if a channel has not been induced, current can still flow from the source to the drain via the shorted source to body connection and the body to drain diode. Because of this, a typical N-channel FET cannot block current flow from its source to its drain.
Source: https://www.digikey.com/en/articles/the-significance-of-the-intrinsic-body-diodes-inside-mosfets

So, the body diode lets the current flow from source to drain without any channel in case of an NMOS.

The body diode is a result of connecting body terminal to source terminal internally in discrete NMOS transistors. I'm emphasizing on "Discrete NMOS" because many weblinks seem to emphasize this point as well; check Link 1 and Link 2.

Link 1: https://electronics.stackexchange.com/a/389409/246366
Link 2: https://electronics.stackexchange.com/a/105561/246366

1647589585950.png

Source: https://electronics.stackexchange.c...tand-the-intrinsic-body-diode-inside-a-mosfet

Question 1:
So, in case of discrete NMOS, the body terminal is connected to source terminal but what about integrated circuits? I think in ICs body terminal would be connected to circuit's ground rather to the source of any transistor? For PMOS, the body terminal would be directly connected to the main power line, i.e., Vdd. Could you please confirm this?

Question 2:
The capture below has been taken from the attachment titled "Pass_1, https://www.electro-tech-online.com...136257/?hash=853c71bf3277105a2fdd29712da93eef . The answers provided are correct but I don't understand the connections. I labelled the connections as "Drain" and "Source" myself. In the attachment they also use the same kind labelling and also on some other webpages I found the same scheme of labelling. think these circuits are classified as pass transistors. For example, look at image part "(d)" below. The drain of PMOS is at higher potential compared to the source, and the source of NMOS is at higher potential compared to the drain. I don't know how such circuits are working in reverse manner where drain and source terminals have been reversed. Does it have something to do with body terminal? Could you please help me?

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As long as the gate-source voltage is correct, a MOSFET will conduct in either direction while "on".
That is used in some analog switching circuits and also occasional power control circuits.
 
Question 1. In integrated circuits, the "body" is called the "substrate" and they are pretty much all connected together by reason of all being made out of the same single silicon crystal. So all "bodies" are connected together but that terminal isn't necessarily "ground" There are ICs where the substrate is at some other voltage. It can even be the most positive voltage. That said, yes, it is usually ground and is ground for logic ICs, memories, microcontrollers, and the like.
This has to be taken into account when designing ICs. There is a problem with CMOS ICs called "latch up" which is a consequence of this.
 
Question 2. I will make two oblique comments. First of all, it is a mistake to say that the N-channel drain must be more positive than the N-channel source (and vice-versa for P-channel). There are perfectly valid circuits and circumstances in which the channel is reverse-biased. In most cases, this results in the body diode conducting but not always. Instead of saying, effectively, that the channel must be forward-biased, as if it were a rule or law, let us say that, if the channel is reverse-biased, the body diode will be forward-biased and so it may conduct even if the transistor is "turned off" via the gate terminal.
Second, the examples you cite are a test question. These don't all represent practical circtuits. Think of circuit D as a "trick question." Don't ask if it is a good circuit. The question isn't whether it makes sense in the real world. The question is, what will it do?
 
You should take a look at some real IC data sheets.

V_OH means the voltage at the output when it is logic high. Likewise, you might see VO_L. DC currents will be IO_H and IO_L and are usually specified at some specific voltage. It's kind of a code. V for volts, I for current (I think it originally meant intensity), O for output, another I for input. Often DC values are capitalized and AC values are lower case. For a logic circuit, you won't see AC levels, you'll see timing specifications. If the voltage isn't referenced to ground, it might have two letters like VGS is the voltage between gate and source. IDS would be the drain to source current but the source is the only place drain current should go so you often see ID.
 
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