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ASM: Cure a 202 Warning - Argument out of range. Least significant bits used.

I expect this is totally wrong, but is this anything like what RJ was trying to explain a few posts back?

Freq Comp.png
 
Not quite, you only have one high/low "split" then sequential.

A binary search works like this (generic diagram I found); each comparison splits it upper/lower, so half, quarter, an eight, a sixteenth etc.

You have less than 16 bands, so just four comparisons (at most) to get to a band.


BST Example.png


The first comparison is to the mid point of the data set.

Then the mid point of the new subset
Then repeat with each new subset.

so eg. Compare to 14.000

If greater, compare to 24.890 ->
else compare to 7.000 ->


For the >= 24.890 branch, compare to 50.000
If greater its at and end of the tree, compare to 52.000; return 7 if <= else return 0.

If less, compare to 21.000; if greater, compare to 21.450; return 5 if <=,
else compare to 18.068

if less, return 0; else compare to 18.168; return 5 if <= else return 0



And the same type of thing for the 7.000 branch, split it until you get to an end point.

Four comparisons or less get you to any band low frequency, then one more for the band high limit check.


It's almost easier to code it than describe it, once you get the concept.
 
If you want to measure and compare frequencies with 1-kHz resolution, does that mean you've decided to use a crystal (~50 ppm tolerance) instead of the internal oscillator (~10000 ppm tolerance) in this 16F628A project, Terry?
 
That is part two of this project Mike.

For the moment, it is just using the internal oscillator as per my original iteration, that is what he is currently using.

Giving him the ability to easily change the frequencies at the head of the code means he can trim it for the internal osc error.

Here's a quick squizz at the pcb for part 2, the row of header pins between the PIC and ULN2803 is to allow the connection of an i2c LCD and switches to allow inputting of the switching points (saved to EEPROM) rather than them being hard coded - LCD and switches are disconnected after setting up.

Still subject to change at this point.

New pcb.JPG
 
OK, here is first bash at doing the compare.

Had to start the compare at 18.068 or the tree was decidedly lopsided.

Still have to fiddle with it because I'm getting 2 high limit compares on one branch in several places.

Also the left hand branch seems to have dropped back in to linear compare mode :banghead:

Will take a break now as it is making my brain hurt.
Freq Comp 2.png
 
That PCB rendering looks very nice, Terry.

May I ask if speed is important? Would a simple method that allows setting the output port within about 10 to 14 instruction cycles after a 1-msec frequency reading be of any interest?
 
I'm going to say "maybe" re speed at this stage, mainly because until I have the actual code finished, I can't time it to see what the delay might be.

There are other delays in the program to allow for relay sequencing when switching bands plus Rx/Tx & Bias switching to account for relay bounce. They range from 8 - 130mS as set in the current users file he sent me.

But it would be worth seeing what you come up with - any and all ideas welcome at this point, bearing in mind the need to set the switching points at the head of the code via Equates.
 

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