Has anyone any tips on how to do this, I've never managed it yet over many years, on various different devices. Consumption in sleep is low, probably low enough, but no where near the claimed figures.
The specific device I've been trying today is the 18F26K22 - chosen for it's large memory (both ROM and RAM), fast speed, and dual serial ports (but that's a different story).
I've even scarcely populated a PCB this afternoon, it has the PIC, a 1uF ceramic capacitor across the supply, a 10K pullup on MCLR, and a reset switch - that's it. I built a minimum board to test, as the other board I was using had a SM I2C FRAM on it, which I couldn't easily disconnect.
So minimum hardware, and minimum software - set the clock up (at 64MHz as I've been using), set all I/O pins to outputs and low, turn off analogue inputs. The main program consists of an endless loop, with a sleep instruction inside - the second line, commented out here, was used to check if the device was sleeping or not, by checking RA0 with a scope.
With the RAO line enabled, and sleep disabled, it consumes just over 9mA - obviously reducing the clock speed lowers that. With sleep enabled consumption drops to 21uA, which is pretty good - but no where near the claimed figures. I've tried turning peripherals off, and lowering the clock speed - rather stupidly as it happens, because the clock isn't running during sleep
The aim of the design will use a 32KHz crystal on tmr1, and wake up every second to run a clock and check if it's time to 'do something' yet, it'll also wake up in response to I/O interrupts and process those - but I'd like to get closer to the claimed figures before doing that.
So has anyone been here?, and managed to achieve what they claim?.
The specific device I've been trying today is the 18F26K22 - chosen for it's large memory (both ROM and RAM), fast speed, and dual serial ports (but that's a different story).
I've even scarcely populated a PCB this afternoon, it has the PIC, a 1uF ceramic capacitor across the supply, a 10K pullup on MCLR, and a reset switch - that's it. I built a minimum board to test, as the other board I was using had a SM I2C FRAM on it, which I couldn't easily disconnect.
So minimum hardware, and minimum software - set the clock up (at 64MHz as I've been using), set all I/O pins to outputs and low, turn off analogue inputs. The main program consists of an endless loop, with a sleep instruction inside - the second line, commented out here, was used to check if the device was sleeping or not, by checking RA0 with a scope.
Code:
while(1)
{
SLEEP();
//PORTAbits.RA0 = ~PORTAbits.RA0;
}
With the RAO line enabled, and sleep disabled, it consumes just over 9mA - obviously reducing the clock speed lowers that. With sleep enabled consumption drops to 21uA, which is pretty good - but no where near the claimed figures. I've tried turning peripherals off, and lowering the clock speed - rather stupidly as it happens, because the clock isn't running during sleep
The aim of the design will use a 32KHz crystal on tmr1, and wake up every second to run a clock and check if it's time to 'do something' yet, it'll also wake up in response to I/O interrupts and process those - but I'd like to get closer to the claimed figures before doing that.
So has anyone been here?, and managed to achieve what they claim?.
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