ADC input impedance related question

[nickagian]

Ok, maybe a stupid question but I need to understand this issue. Suppose we have an ADC with 2k input impedance and 25pF input capacitance at every input channel. And suppose we want to connect an analogue voltage source to the ADC with output impedance that equals Rout.

Generally, it is known that when connecting two analogue stages, in order to avoid signal loss, the output impedance of the first stage should be kept minimum around one tenth of the input impedance of the second stage. However, is this true for the ADC case, too? I mean, if the output impedance of the analogue voltage source is higher than (or even around the same) the input impedance of the ADC, is that a problem? Can this difference and problem be overridden by adjusting the sampling time of the ADC to a proper value? Or the accuracy of the measurements taken is significantly large?

 

[Gary B]

The most obvious problem I see is the ADC will load down the source giving a lower answer than expected. If you are dealing with relative values instead of absolute values and not building a piece of test equipment, you can always fudge the digital results to compensate.

 

[dknguyen]

You are correct on all cases.

Just think of it has a source voltage and series resistor driving a parallel load resistor and capacitor. As long as the sampling capacitor charges up to the source voltage the ADC reading will be "100%" accurate. So slowing down the ADC sampling time will allow higher accuracy if you have crappy source-load impedance.Alternatively you could maintain your ADC sampling time, but reduce the bandwidth of the input signal. That load capacitor will charge up to the load voltage source (or to within your ADC resolution)...eventually...

In the most general sense,you just need the the bandwidth of the input signal to be low enough so that the input signal reacts more slowly than the ADC sampling time. You want the input signal slow enough relative to the ADC sampling speed so to prevent aliasing.

That 1/10th (Aka significantly greater than so as to be considered infinitely greater than and thus negligible) is exactly that. It just means you can neglect a lot of stuff and it makes it simpler to analyze. It doesn't mean that it's the only case where it works, just that it's close enough to be considered the ideal case. All other cases involve more work to analyze.

 

[Gary B]

Please keep in mind one additional point. The ADC has a fixed maximum accuracy that is determined by the digital word length. The optimum design will have the sample rate and other factors mentioned held to ± ½ LSB.

 

[MrAl]

Hello,


I have found that when using high value resistors (like 50k or 100k) the only thing i have to account for at room temperature is the extra time the internal cap takes to charge up to within say 0.1 percent of max. That means when changing the input channel we have to allow for a bit more time for the acquisition itself.
Of course the accuracy with temperature will be off unless you use the chip (and calibrate it) at only one specific temperature like room temperature because that depends on a lower value resistor to work properly over the full temperature range..

 

[edeca]

MrAl is right. You may use a higher source impedence, but you will have to account for the longer charge time. This also makes it potentially less accurate, as you are working outside the recommended limits.

One fix if you need to measure something with a higher impedence is to measure a number of times and take the average. You can also use a form of successive approximation in software if you need better accuracy.