Been busy. Not sure if I will be able to do a full-fledged design. The app note with the 4627 is basically what you need for the voltage to current converter. The main issue is figuring out what the resistor should be. You do know it's 350 uA and you need to know, or can find, the max p-p or RMS voltage that the cihip allows and size the resistor accordingly. That should not be hard. You just have to sift through the data.
With the offset voltage so low, I doubt that offset compensation is required. If it is, it means an extra 4627, a reference and a few resistors.
When laying something like this out, you have to include bypass resistors and guards/grounds around the input pins. They are a ground plane that doesn't touch the + and - pins, but surround the pin. Better yet, is a voltage at the same potential as the pin surrounding the pin.
I'm wondering if a 4-layer board would make life a lot easier. gnd(top), +5, -5, traces for the most part. You can have traces at every layer. It's best to have vias not attached to a through hole pin if possible.
With the offset voltage so low, I doubt that offset compensation is required. If it is, it means an extra 4627, a reference and a few resistors.
When laying something like this out, you have to include bypass resistors and guards/grounds around the input pins. They are a ground plane that doesn't touch the + and - pins, but surround the pin. Better yet, is a voltage at the same potential as the pin surrounding the pin.
I'm wondering if a 4-layer board would make life a lot easier. gnd(top), +5, -5, traces for the most part. You can have traces at every layer. It's best to have vias not attached to a through hole pin if possible.