Looking at the diagram can you see any glaringly obvious mistakes?
Spec:
Input 0 -100V AC, 500mA fixed. Most of the time Vin < 25V AC.
Active rectification, 95% sync buck - absolute max efficiency < 36v
Terrible efficiency > 36v AC (can live with it).
FET prevents reverse voltage through active rectification (4 FETS) which means the PIC is doing the voltage comparison, not an expensive LT chipset.
Buck, Fets, Boost will be spec'd to withstand the 36V
Buck min voltage is 5.25v to give 4.75v (min USB spec)
Output: 5V, 3A max.
Operation:
Prevent DC backflow -> If (11) < (5) or 11 < 5.25v, turn fet1 off
Charge caps -> if fet1 on, turn boost on, turn fet2 off
Voltage dip -> if fet1 off, turn boost off, turn fet2 on
Voltage trip -> if (5) < 5.25 or (8) < 4.75v turn buck off, activate delay.
Notes:
The super caps have a useful range of 33v-5.25v. They will get hammered but will last longer than li-ion. I've found supercaps to have poor performance in the past, especially the Chinese stuff and wonder if the ESR will be too high in series to offer a meaningful current output. I'm looking for a 2 minutes at 500mA output when fet1 is turned off.
The PIC inputs (7) is for calculating Wout and reporting this and other stats via USART (9).
Frequency monitoring via TIMER0 may be added to the AC line or can be done using (11) in software. I don't know yet if a pin can be a trigger and ADC?
Spec:
Input 0 -100V AC, 500mA fixed. Most of the time Vin < 25V AC.
Active rectification, 95% sync buck - absolute max efficiency < 36v
Terrible efficiency > 36v AC (can live with it).
FET prevents reverse voltage through active rectification (4 FETS) which means the PIC is doing the voltage comparison, not an expensive LT chipset.
Buck, Fets, Boost will be spec'd to withstand the 36V
Buck min voltage is 5.25v to give 4.75v (min USB spec)
Output: 5V, 3A max.
Operation:
Prevent DC backflow -> If (11) < (5) or 11 < 5.25v, turn fet1 off
Charge caps -> if fet1 on, turn boost on, turn fet2 off
Voltage dip -> if fet1 off, turn boost off, turn fet2 on
Voltage trip -> if (5) < 5.25 or (8) < 4.75v turn buck off, activate delay.
Notes:
The super caps have a useful range of 33v-5.25v. They will get hammered but will last longer than li-ion. I've found supercaps to have poor performance in the past, especially the Chinese stuff and wonder if the ESR will be too high in series to offer a meaningful current output. I'm looking for a 2 minutes at 500mA output when fet1 is turned off.
The PIC inputs (7) is for calculating Wout and reporting this and other stats via USART (9).
Frequency monitoring via TIMER0 may be added to the AC line or can be done using (11) in software. I don't know yet if a pin can be a trigger and ADC?