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95 % efficiency SMPS

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Thunderchild

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I would like to build a SMPS circuit to drop 17.5 volts to 14 volts @ 5 amps with an efficiency of 95 ish %.

can anyone recomend a good chip for this ? I'd like to understand something about SMPS. Are they more efficient at higher or lower frequenzys ? I've assumed lower as then the transistor has to switch less often but what about inductors ?
 
The main areas of dissipation in an SMPS are (Buck topology)...

1. Driving losses to the MOSFETS/IGBTs. Increases with frequency, independent of duty cycle.
2. Switching losses. Increases with frequency, independent of duty cycle.
3. Diode losses. Independent of frequency, Increases with duty cycle.
4. Capacitor ESR losses. Decreases with frequency.
5. Inductor resistance. Independent of frequency, increases with duty cycle.

That's all I can think of before coffee...
 
hm so basically i need to lower the frequency as much as possible (well get a chip that runs lower) and have a low as possibly duty cycxle which I can achieve by using 35 V input instead of 17.5 (have 2 17.5 solar panels)
 
cant be done since duty cycle is the conversion ratio.

you need to get a buck regulator chip with synchronous rectification in a circuit capable of running at 50V at least. FETs should have both low total gate charge (to minimize switching losses) and low Rds on (to minimize conduction losses)

the inductor sees continuous output current and it's resistance causes losses. what was not mentioned above was that the switching frequency also causes inductor losses and varies with inductor type and how hard it is being driven.

Dan
 
I would think actually that lower duty cycles cause more diode loss as the diode is in use when the output transistor goes off not when its on.

I need 13.5-14 V output, I have a choice of input between 17.5 or 35 volts solar panels in series or parallel, if in series and with 35 volt input then the duty cycle will be less than with 17.5 v input as I will always want 14 ish volts out.

I am curious about inductors and frequency thats the one thing I'm uncertain of. I could use a fet in replacement of the skotky diode.
 
from te little I'm seeing of SMPS chip datasheets the higher the duty cycle (the less the difference between Vin and Vout) the higher the effciency, does anyone have any further thoughts ?
 
from te little I'm seeing of SMPS chip datasheets the higher the duty cycle (the less the difference between Vin and Vout) the higher the effciency, does anyone have any further thoughts ?
With a diode freewheeling rectifier, the efficiency will improve at higher duty cycles since the diode is conducting for a shorter portion of the cycle. With chips that use a synchronous rectifier, which has a MOSFET in place of the diode, the variation with duty cycle should be much less. For best efficiency you want to use a synchronous rectifier.

There will be some high frequency loss in the inductor, which would be proportional to frequency, but that should not be affected much by the duty cycle.
 
so all in all the lower the frequency the better the efficiency. duty cycle won't make much difference if using a syncronous rectifier, basically I'm better off with what I have at 17.5 V input but need to find something that switches slower
 
...
4. Capacitor ESR losses. Decreases with frequency.
...

That's all I can think of before coffee...

Umm... ESR losses increase with frequency. Urgent coffee needed. :D

Hi again Thunderchild, so you're gonna actually build this?

I still recommend going the 35v -> 14v route, it's much easier to get close to that 95% figure with an almost 50:50 duty.
 
so all in all the lower the frequency the better the efficiency. duty cycle won't make much difference if using a syncronous rectifier, basically I'm better off with what I have at 17.5 V input but need to find something that switches slower
The main disadvantage of lower frequencies is that it require a larger inductor and filter capacitor.
 
The main disadvantage of lower frequencies is that it require a larger inductor and filter capacitor.

well my idea is as efficient as possible, I will worry about designing it first then think of wether its worth building later, I'm just a little peeved that all chips that I find available are like 80 % efficient only, if you have space constraints fine raise the frequecy to use smaller components but if your after maximum power gain and have the space then get all you can out of the converter. OK I know bigger components will cost more but this is not about cost. thats the sad thing anything designed has to be more cost effective than efficient what I'm after is pure efficiency
 
Look at the TPS5450. It is very simple! Maybe run two in parallel to boost efficiency.
also
Look at the LM3150. Use "BIG" MOSFETs to help with losses.
If you convert 17.5 to 14 the FET is on most of the time and by using a BIG FET you can save power. The bottom FET is on so little it does not matter much.
 
why not just add more panels?

because the panels cost more than the SMPS so even in this case it comes down to cost ! I'm getting real confused here as to what the conditions are for higher efficiency mainly duty cycle.

let me see for certain lower frequency is more efficiant ?

duty cycle seems to be a matter of opinion on here
 
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because the panels cost more than the SMPS so even in this case it comes down to cost ! I'm getting real confused here as to what the conditions are for higher efficiency mainly duty cycle.

I think you're hoping for something pretty impossible - you've said in this thread that you have 17.5V from a solar panel - is that constant and never changing?, I don't think so, it will vary about all over the place.

95% is probably the maximum you could possibly get under perfect conditions, ona good day, with the wind behind you - don't chase the impossible.
 
well basically i want to be able to make a 95 % efficient SMPS whether or not it suits the application is another matter
 
At what loading point do you want 95%? It definitely won't happen at light loads unless you have a controller that can switch to a hysteretic mode during light load operation. For that you'll have to look at Buck regulator controllers designed for laptops or portable devices. You need to look at controller ICs and go with discrete FETs. Start looking at companies like Intersil, TI, Maxim, etc for more specialized controller ICs.

You should be able to get good efficiency with proper component selection and don't be afraid of frequencies of 100kHz to 300kHz. A really tight layout is also going to be essential - I would recommend nothing less than a 4 layer board with at least 2oz copper on the top and bottom.
 
not true. while synch buck controllers may be considered the norm now - as opposed to standard bucks, only recently have controllers started employing hysterical control at low loads. more recent improvements include phase shedding for multiphase converters and diode emulation for discontinuous mode operation.
 
actually in the case of solar panels a proper SMP is probably overkill, my output is to be fixed and it will be working in continuos mode as as much power as possible will be drawn, the only varialbe being a solar panel, why not then a circuit with low frequency and a variable duty cycle which is ccontroled by the input voltage ? the higher the voltage the lower the duty cycle ? ok I know that at the end of the day its sort of a smps but a real skelnton one.

I'm still interested though in the concepts that control the efficiency of SMPS circuits its quite an intriguing feild where it would seem that the obvious is not the case and as we have seen in this thread people seem to have oposite ideas
 
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