Yes, I understand the principle. I know any circuit can be implemented with just NAND or NOR. The problem is figuring it out. The approach of tying the outputs together in lieu of an OR gate doesn't work: if you tie gate1+gate2 together for one output, and gate2+gate3 together for another output, then what you have is the three gates tied together and both outputs identical and wrong. Maybe this is fixable with diodes but the problem stated just 13 NOR gates.
The wording of the question is interesting though. It asks if it is possible. So my thinking is maybe the answer is in fact NO, but I wouldn't have a clue how to go about proving it.
Without any gate restrictions here's how I would do it (ASCII art, so use your imagination):
Code:
LED layout:
0
1 2
3
4 5
6
Truth table:
ABCD 0123456
0 0000 1110111
1 0001 0010010
2 0010 1011101
3 0011 1011011
4 0100 0111010
5 0101 1101011
6 0110 1101111
7 0111 1010010
8 1000 1111111
9 1001 1111011
Equations:
0= !A.!B. C + !A.!B. !D + !A.B.C + !A.B. D + A
1= !A.!B.!C.!D + !A. B.!C + !A.B. !D + A
2= !A.!B + !A. B. C. D + !A.B.!C.!D + A
3= !A.!B. C + !A. B.!C + !A.B. !D + A
4= !A.!B. !D + !A. B. C.!D + A. !D
5= !A.!B.!C + !A.!B. D + !A.B + A
6= !A.!B. C + !A.!B.!D + !A.B.!C. D + !A.B.C.!D + A
Circuit:
_ _ _ _
A A B B C C D D
| | | | | | | |
| o | o o | | |-D\
| o | o | | | o-D \
| o o | o | | |-D OR-->0
| o o | | | o |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o | o | o-D\
| o o | | o | |-D \OR-->1
| o o | | | o |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o | | | |-D\
| o o | o | o |-D \OR-->2
| o o | o | o |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o o | | |-D\
| o o | | o | |-D \OR-->3
| o o | | | | o-D /
o | | | | | | |-D/
| | | | | | | |
| o | o | | | o-D\
| o o | o | | o-D OR-->4
o | | | | | | o-D/
| | | | | | | |
| o | o | o | |-D\
| o | o | | o |-D \OR-->5
| o o | | | | |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o o | | |-D\
| o | o | | | o-D \
| o o | | o o |-D OR-->6
| o o | o | | o-D /
o | | | | | | |-D/
| | | | | | | |
So that's 4 inverters (to get !A from A etc), 29 AND gates and 7 OR gates (40 gates total). There are some duplicate functions here and the gate count can be reduced by not duplicating those lines, but not enough to get it sufficiently below 13 gates so that a simple NOR conversion will result in 13 gates.
If it is possible, then it's going to be by some deviously well thought out combination of gates. I've wondered if this can be used in the design:
Code:
A--+--------
| NOR---> !(A+!B)
+- +-
NOR--+-------> !(A+B)
+- +-
| NOR---> !(!A+B)
B--+--------
which is three quarters of the 4-NOR NXOR implementation, but so far haven't seen how to combine those outputs in any meaningful way. Probably there is some fancy combination like this but with more gates; I've tried a couple of ideas but haven't got close; I've also considered brute-forcing it but keep hitting numbers of the order 10^45 so that's not practical.
I've spent waaaaaaay too much time on this already. OP: just say NO and risk taking the hit, but call them on it and make them show how it's done.