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5-Bit binary to BCD converter

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henyo2490

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HI !

I'm trying to make a 5-bit binary to bcd converter for a long time. I have already made one design which uses basic logic gates and leave me no choice but to use too many ICs. I want to make a design which uses less IC because it is for my project. I used the boolean algebra to make my fist design.
Can anyone please help me how to design the shorter one?

I have researched about this converter in this forum and i have found one but it is a 4-bit binary to bcd converter which uses 7483 and nand gates. I think this design will some how help me to finish my design. But again it is only accepting 4-bit binary number. And my goal is to convert 5-bit binary to BCD.

This is the image of the 4-bit binary to BCD converter:

https://www.electro-tech-online.com/attachments/binary-to-bcd-gif.18767/

Please anyone who can give me some advice, hints or solutions to make this possible. I greatly appreciate all your answers or replies. Thanks
 
Parallel load a 5 bit binary down-counter with your starting binary value. Zero a five-bit decimal up-counter. Count the binary counter down until it reaches zero; simultaneously count the decimal counter up. When it stops, it will have the correct BCD value.
 
A suitably programmed ROM is also a single-chip solution.

Jeff
 
Absolutely. And I seem to remember there's a couple logic chips that do binary to dual bcd in one chip;
DM8899
74185

Or you could use a parallel eprom with 5 inputs (address) and 2 sets of 4 BCD outputs (8 data out bits).
 
Binary to BCD Converter

Thanks for the replies!

I am not permitted to use microcontrollers or Prog. ROM. Only basic IC such as 4-bit adder and basic logic gates. Please help me re-arrange and add some IC to the circuit I gave about 4-bit binary to BCD converter to make it accept a 5-bit binary input. I already try to rearrange and add some IC but I cant produce the right BCD output.

Please help me... Thanks
 
If you followed the link in my previous post you would see a circuit that uses adders and I wouldn't have to repost.

"You can lead a horse to water but you can't make him drink."
 
hi crutschow!

I saw the post and circuit that u posted. Where is the binary input there? is that parallel input or serial input? i need a parallel one. thanks
 
hi crutschow!

I saw the post and circuit that u posted. Where is the binary input there? is that parallel input or serial input? i need a parallel one. thanks
The "BINARY IN MSB FIRST" is the serial input. If you need parallel then use a serial/parallel shift-register to convert the parallel to serial. Or use Mike M.'s scheme with counters, which has a parallel input.

Converting serial to BCD is not trivial and thus a solution for more than 4-bits using simple logic is not possible.
 
thanks for the replies crutschow!

And what does the circuit looks like when it is for parallel input coz i dont have any idea how to do it because we are not introduce to lectures about shift registers yet.

Is there any solution that doesnt need any shift registers, only adders and some basic logic gates. I'm preferring about parallel input not serial input.
 
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And what does the circuit looks like when it is for parallel input coz i dont have any idea how to do it because we are not introduce to lectures about shift registers yet.

Is there any solution that doesnt need any shift registers, only adders and some basic logic gates. I'm preferring about parallel input not serial input.
There is no solution that uses only adders and logic gates.

Do you understand counters? Then use Mike M.'s suggestion.
 
Hi,


Parallel binary to parallel BCD has a one to one mapping, so i would think regular logic
gates like OR, AND, NOR, AND, NOT should do it one way or another.


Here are the beginning logic statements for outputs A through E. These can
be simplified greatly to reduce the number of gates. Note that these statements
are for only 4 bits input, not 5. You'll have to solve that yourself :)
This is just an example of one way to get there...


Code:
ab'c'd'e'+abc'd'e'+ab'cd'e'+abcd'e'+ab'c'de'+abc'de'+ab'cde'+abcde'

a'bc'd'e'+abc'd'e'+a'bcd'e'+abcd'e'+a'b'cde'+ab'cde'

a'b'cd'e'+ab'cd'e'+a'bcd'e'+abcd'e'+a'bcde'+abcde'

a'b'c'de'+ab'c'de'

a'bc'de'+abc'de'+a'b'cde'+ab'cde'+a'bcde'+abcde'
As an example of how much these might simplify, the first (top) statement simplifies to one
input: a
which of course is bit 1 of the input.

Each term of the above statements is made by observing what logic state is required to get a '1'
on the output for that bit when it is required. If the input bit is '1', then use the letter, if '0' then
use the letter negated.
 
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