I'm not talking about the bias Vgs which sets the idle current. What I'm talking about is the fact that the audio signal output will not swing anywhere near ±33V because the source voltage is always apx 6-10V lower than the gate voltage (Nfet example). Now, if you powered your driving OpAmp from ±43V and the FET drains from ±33V, you'd be able to get close to ±33Vpk audio at full volume instead of ±23-27Vpk. To do this you'd need a separate low current ±43V supply for the OpAmps in addition to the high current ±33V supply for the MOSFETs. (Or you could stack two small 10V supplies on each of the ±33V rails)