I'm having difficulties troubleshooting a possible unintended latch. The board I'm testing with is an Altera DE2-115. I'm using the platform designer and the VHDL code that I had to enter was just the component and ports:
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all...
Hey guys! :D I need to do something on VHDL.
The problems is this: I have a 8 bit input, and i have to order the bits of it.
The zeros to the right and the Ones to the left.
Example :
input <= "01100011"
output<= "11110000"
I need to count the number of zeros or ones but without foor loop.
With...