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spec, I see you a channeling the ghost of the guru and father of linear IC design, Bob Widlar.
His analog designs in the early days of IC circuits were amazing.
Yes, Bob Widlar, genius and real character. I wondered if anyone would recognise him. The first op amp I worked with was his μA702; they were £40 each and if you blew one up, which was quite easy, you were in big trouble. Those were heady days as we eagerly awaited the next creation from Fairchild, Texas, National, and RCA. Of course, Jean Hoerni laid the foundations by inventing the planar process.
Chapter 8 of, 'History of Semiconductor Engineering' by Bo Lojek is dedicated to Widlar. The book is a fascinating read from an insider. (ISBN-13 978-3540-34257 publisher: Springer)
Spec. I am having trouble trying to figure out what your trying to do with the reference diode (it is being used in a most unconventional way). The circuit in particular is copied from your design in image below.
I assume you are trying to create a reference point for your OPA. From the way the circuit is drawn, you will have about 10.75 vdc on the non-inverting pin of the amp. Normally a reference diode has a Rbias resistor on the cathode side to provide the current thru the diode. The way you have it, the device will not function like a typical reference circuit (Have you simulated this?). Maybe I am just not seeing something.
Also, if your 50 ohm things is intended to output into a 50 ohm load, then the way you have it is not right as when you connect a 50 ohm load to it, you will essentially have 25 ohm as two 50 ohm in parallel. I think you need the 50 ohm to be in series with the output to form a voltage divider. That is the way sig gens do it. Then again, I may be missing something.
I noticed that too. The way that is connected it looks like he is developing a reference that is oriented *down* from +Vcc, which would be right if he wants the reference to track +Vcc rather than ground. But normally we dont like to do this because everything else is usually referenced to ground. So it depends what he is actually doing with this circuit. An example where we might want it to track +Vcc is for a current source circuit, where the op amp needs a reference that is actually referenced to +Vcc not ground. If the inverting terminal is referenced to ground then we need the reference voltage to be referenced to ground, but if the inverting terminal is referenced to something that originates from +Vcc then we need it to be referenced to +Vcc instead of ground.
I havent read this whole thread so you might clarify what the use of this circuit is if you wish.
[A FEW MINUTES LATER]
I see what i think is the whole circuit in post #18 now.
This means the reference set up looks right because the inverting terminal voltage is based relative to +Vcc not ground. If it was referenced to ground then it would not pick up variations in the +Vcc line while the inverting terminal would, which would of course cause errors in the error measurements seen by the op amp.
Okay, I just simulated that part of the circuit and it is about 10.75 vdc on the non-inverting pin of the op-amp. You can see the point where the ref diode kicks in, so I am still confused.
Morning from the UK. It's 5:30 am and I haven't woken up properly.
Mikebits, I like nothing better than discussing circuits, but you had me really worried. I thought I had made some gross error- which is not unusual- when I read your post. That would have been embarrassing for a newbee on ETO, but I had a quick look at the schematic in post 18 and I'm relieved to say that it is correct, or should I say as intended.
MrAl you have it right in your last bit in post 27
I will post a full reply here later, that is if the boss doesn't have other plans for today, like finishing the paving in the garden or going shopping, etc.
Mike:
Your schematic makes this easier to talk about
The primary issue is the reference voltage in relation to the voltage drop across (your) R5, which measures the output current by providing a voltage drop.
The voltage reference provides a voltage drop relative to +Vcc (top of your V1), we'll call it Vref.
The inverting terminal is connected to the bottom of (your) R5, so it is trying to sense the voltage across R5.
When the voltage across R5 equals the value of Vref, the circuit is in equilibrium due to the fact that the voltage at the non inverting terminal and the voltage at the inverting terminal are very nearly equal, and that is the point where the op amp will stop increasing (or decreasing) voltage to the gate of the MOSFET.
Now on the other hand, if the inverting terminal went to the top of (your) R7 instead, then we would have to connect the reference voltage such that it was referenced to ground (bottom to ground, reference voltage from the top or resistor divider as needed). You'll see many circuits constructed like that, but you'll also see many circuits constructed like this one, sometimes with the reference voltage still referenced to ground in the more non critical applications (although it wont be as good if +Vcc can change much during normal operation which includes load regulation, line regulation, temperature aspects). After i thought about your replies i think this might be what seems confusing...that the voltage is a voltage no matter where it comes from. If we do reference it from ground however it is not as good as explained above (we have to consider variations in Vcc and their effect on the output current regulation).
The secondary issues are:
1. The resistances must be right in order to get the right current out or range of currents out.
2. The voltage reference must be of the right level.
3. The voltages at the inputs to the op amp must meet the common mode input range spec's.
4. The MOSFET must be of the right type (N or P channel) in order to work properly with the direction the output of the op amp takes when an error voltage is sensed. The wrong type will cause an output latch-up, and possibly other issues.
But the primary issue (voltage reference referenced to +Vcc instead of ground) is correct as is. If there are values that have to be changed to meet the practical aspects of the circuit (a few mentioned above) then they have to be corrected too in order to get it to work properly.
If you still have doubts, try simulating with 12.000v first, then with say 13.000v, and note any change in the output current with some fixed load.
Then, try referencing the voltage reference to ground by using a 10.75v reference (if that is what you measured it to be from ground up), and do the same thing: vary Vcc from 12 to 13 volts and see what effect that has on the output. I think you may be surprised
Of course i am assuming that the practical aspects of the circuit have been met already. If not, that has to be corrected before doing the two tests.
Here is a schematic which may help to show the function of the constant current generator. It's fully designed, (apart from errors) and could be built. I've include all the circuit currents and voltages too.
Mikebits, if you fancy doing another simulation you can replace the 10 Ohm resistor into the MOSFET gate with a link. The resistor has nothing to do with the circuit function and is just good practice to discourage the MOSFET from hooting. If you do want to run a simulation please remember the circuit's function: to generate a precise DC current and from that, a precise voltage, regardless of supply variations etc so the out put for the model should be the voltage across the 50 Ohm resistor at the 12V supply line. The input variable should be the power supply line, so vary that as MrAl says, between 12V and 13V or so. Nothing should happen to the 50Ω OUTPUT voltage. In fact, the output voltage shouldn't change however high you make the supply line. That's the characteristic of the design.
Although the circuit has been put on its head it's identical to the original in terms of function and precision.You will probably notice that some of the circuit details have changed but that's only a bit of optimisation and to correct an error.
MrAl, you have got the circuit pretty much sussed from what you say in your posts, but there is just one thing, the circuit of post 18 and this post are fully designed and would function if built, although I didn't bother to specify an actual PMOSFET. When I said that it wasn't fully developed I didn't mean the basic function as you imply. I was thinking of minimising costs, optimising the layout and cooling etc and getting the last knockings of accuracy.
There was an error in the original circuit which may have caused some confusion: the 25K resistor in the V Ref divider chain should have been 15K. It was just a typo but it meant the the output voltages would have only been 70% of the intended value. The latest issue of the scope calibrator schematic is in the following post.
The potential divider across the V Ref Zener has been removed and the constant current generator uses the full 2V5 generated by the V Ref Zenner. As the resistors are 0.1% removing the resistor chain eliminates a possible worst case error of 0.2%. It also has the advantage of lowering the op amp's input voltage which means that the op amp will be using it's lower, and better, difference amplifier, although either amplifier would be more than accurate enough for this application. The only downside is that the current defining precision resistors up at the 12V supply rail have 2.5 times the voltage across them, which means they will get hotter which is always bad for precision, especially long term. This is not significant at the lower output voltages but it is significant at the higher settings. That is why there are more resistors in parallel.
I have done a quick worst-case error budget and removing the voltage divider resistors has improved the total from 0.5% to 0.3% which is now better than Mosaic's initial requirement. Of course other factors can affect the accuracy: layout, decoupling, etc etc but with all those aspects sorted out', the scope calibrator shouldn't be far off in terms of accuracy.
**broken link removed**
ERRATA
This issue is now obsolete. Please see new version at post 63
MrAl, you have got the circuit pretty much sussed from what you say in your posts, but there is just one thing, the circuit of post 18 and this post are fully designed and would function if built, although I didn't bother to specify an actual PMOSFET. When I said that it wasn't fully developed I didn't mean the basic function as you imply. I was thinking of minimising costs, optimising the layout and cooling etc and getting the last knockings of accuracy.
I did not try to imply that there was anything practical wrong with the circuit, just that if there was it would have to be corrected. I said that really because i was just authenticating the basic design theory behind the different voltage reference arrangement and did not take the time to check out the entire circuit in detail. So i really just wanted to stick the burden of a full analysis on whoever was going to use this so i would not have to get involved in that. My goal was limited to showing that the voltage reference placement was correct.
I am happy to hear you checked it out completely and it passed the test of practicality
No probs MrAl, I was just concerned that you and Mikebits might have thought that the circuit hadn't emulated well because the details needed sorting out. As far as the practicality goes, it does look ok on paper but my experience is that when you actually build a circuit that's when all the gremlins come creeping out. The next time is when the customer comes to view it perform and when it goes into production you get a load more. Keep the posts coming. I've been reading quite a few of yours on EON.
Before starting any design ( my frequent rant) you must write your own Design Spec.
If duplicating this instrument, ensure this is what you need, and we don't start chasing skinny little rats late into the design....
- for example this product has a rise time < 1ns with differential outputs +,- Is that what you will do?
if the signal risetime is at least seven times faster than the risetime of the oscilloscope vertical system, the displayed (observed) waveform will have a
risetime that is very close to the risetime of the vertical system. ...
If a fast-step signal produces a crt display with little or no overshoot or ringing, the product of oscilloscope risetime and oscilloscope bandwidth should result in a factor whose value lies between 0.329 and 0.350.
Start by listing exceptions if this is a shorter list.
There is much more than simply a laser-trimmed wafer Voltage reference IC.
My suggested design should produce a reasonably good square wave, but it would be much better to have a separate circuit on the scope calibrator designed especially for this purpose. The same general approach could be used, but simplified with only one low output voltage and using fast components.
"Propose to an Englishman any principal, or an instrument, however admirable, and you will observe that the whole effort of the English mind is directed to find a difficulty, a defect, or an impossibility in it. If you speak to him of a machine for peeling a potato, he will pronounce it impossible : if you peel a potato with it before his eyes, he will declare it useless, because it will not slice a pineapple" : Charles Babbage
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