PNP & MOSFET Based Switch: What Went Wrong?

[blackshadow]

Hello Everyone,

I do have an electronic circuit with the following goals:

a. if the input voltage is >7.0V, supply the load with Vsource1 (0 to 3.5V)
b. if the input voltage is <1.0V, supply the load with Vsource2 (2.2V)

I have simulated this conditions using PNP(2N2907) and MOSFET (BSS138).
See attachments (schematic and .asc file)

At condition #b, simulation output Vload at 1.89V, 2V, 2.16V as VVAsource1 increases.

Why is this? Ideally, the MOSFET should be switched OPEN hence it should not affect Vload.

I now implemented the circuit with;

>Gate/Drain Bias set to 0.0V
>VVAsource1 set to 1.5V
>VVAsource2 set to 2.2V

Actual measurements;

>Vload = 2.17V
>Vgate/drain = 1.48V!

Why are we having a voltage drop at Vgate/drain supply source? The voltage measured also varies as we vary VVAsource2.

Need your inputs.

 

[ericgibbs]

hi,
If I understand correctly what you are trying to.?
As with most semiconductor devices the response curves for Vbe and Vgs are not linear and well defined, so you will not get a sharp conduction cut off at the voltage set points.

I would consider a comparator circuit.

 

[blackshadow]

hi,
If I understand correctly what you are trying to.?
As with most semiconductor devices the response curves for Vbe and Vgs are not linear and well defined, so you will not get a sharp conduction cut off at the voltage set points.

I would consider a comparator circuit.

Thanks for your input.

But what bothers me is how did the 1.48V voltage measured at the POS terminal of the GAte/Drain Bias Power Supply (set at Zero Volts)

Do you know how it happened?

 

[ericgibbs]

Thanks for your input.

But what bothers me is how did the 1.48V voltage measured at the POS terminal of the GAte/Drain Bias Power Supply (set at Zero Volts)

Do you know how it happened?

hi,
Because when Gate/Drain bias is 0V, the PNP transistor is biassed ON, so you have a voltage drop across R1.

 

[blackshadow]

hi,
Because when Gate/Drain bias is 0V, the PNP transistor is biassed ON, so you have a voltage drop across R1.

Yes its true that at 0 volts, PNP is "switch CLOSED" and MOSFET is "switched OPEN" or its Gate to Source is OPEN circuit.
The voltage drop across R1 is fully dependent only on VVAsource2 which is closed ciccuited to R1.

COuld it be possible that this 1.48V is the drop at the internal resistance of the Power Supply by the Sinking Base Current of the PNP?

 

[ericgibbs]

Yes its true that at 0 volts, PNP is "switch CLOSED" and MOSFET is "switched OPEN" or its Gate to Source is OPEN circuit.
The voltage drop across R1 is fully dependent only on VVAsource2 which is closed ciccuited to R1.

As I explained the circuit is showing 1.48V because the transistor is switched into saturation, is conducting.

 

[blackshadow]

As I explained the circuit is showing 1.48V because the transistor is switched into saturation, is conducting.

Thanks for performing the simulation. I seem to don't understand your point. My apology.

Can you please explain further?

I know that the PNP is saturated where Veb(sat) = ~0.7V. Vb therefore is = 2.2-0.7 = 1.5V. Is this right?

Can you suggest of other mechanism or design to do this?

 

[ericgibbs]

Thanks for performing the simulation. I seem to don't understand your point. My apology.

Can you please explain further?

I know that the PNP is saturated where Veb(sat) = ~0.7V. Vb therefore is = 2.2-0.7 = 1.5V. Is this right?

Can you suggest of other mechanism or design to do this?

The pnp is in Vce sat, this means the voltage drop from Collector to Emitter is approx 0.1V to 0.2V, so the Vc across R1 is approx 2.2V -0.1V = ~ 2.1V.
The pnp Vbe will be approx 0.7V

I would look at using a dual LM393 comparator IC, the circuit can be designed with a sharp transition at the two voltage Set point values.

 

[blackshadow]

The pnp is in Vce sat, this means the voltage drop from Collector to Emitter is approx 0.1V to 0.2V, so the Vc across R1 is approx 2.2V -0.1V = ~ 2.1V.
The pnp Vbe will be approx 0.7V

I would look at using a dual LM393 comparator IC, the circuit can be designed with a sharp transition at the two voltage Set point values.

Now we are on the same page. Thanks!

Ok I will try designing using LM393. I will get back to you with my design.

Regards

 

[crutschow]

I didn't see it mentioned, but that circuit has no base resistor. Thus the current through the PNP base when the input is low would be very high as it is limited only by the small internal base-emitter resistance. In real life the transistor would likely blow.

 

[ericgibbs]

I didn't see it mentioned, but that circuit has no base resistor. Thus the current through the PNP base when the input is low would be very high as it is limited only by the small internal base-emitter resistance. In real life the transistor would likely blow.

For reference, the Ibase measured out out at 132mA, as this circuit is never going to work in the OP expects too, I didn't consider it necessary to point it out.

IIRC the OP has now considering a LM393.

 

[crutschow]

For reference, the Ibase measured out out at 132mA, as this circuit is never going to work in the OP expects too, I didn't consider it necessary to point it out.

Well, I thought it curious that no one mentioned it. It seems good to note though, just for any future designs he may attempt or for someone else looking at the circuit.

 

[ericgibbs]

Well, I thought it curious that no one mentioned it. It seems good to note though, just for any future designs he may attempt or for someone else looking at the circuit.

I think if we pointed all the shortcomings in most of the circuits posted, we would fill a couple of pages for each circuit.

I initially prefer to point out the salient features of a circuit thats not capable of working rather than trying to explain all the other problems.
Bit like telling a guy his car tyres are soft when his engine has just seized up.!

 

[blackshadow]

Well, I thought it curious that no one mentioned it. It seems good to note though, just for any future designs he may attempt or for someone else looking at the circuit.

i forgot to include the base resistor in the circuit attached but in my design i used around 100 ohms...

 

[blackshadow]

i have this setup (See attached schematic):

VVAsource1 varies from 0 to 3.5V
VVAsource2 fixed at 2.2V
GateBias Supply set to 0.0V

Results:
Ve(Q1)=2.18
Vc(Q1)=2.10
Vb(Q1)=1.4
V(gatebias supply) = 0.85V

I(VVAsource1)=41mA
V(VVAsource1)=2.18V

I(VVAsource2)=45mA
V(VVAsource2)=1.35V

Questions:

1. Base current would be (1.45-0.85)/1000= 6mA
Load current would be (2.10V/3.93k) = 0.6mA

Now, Q1 total current would be equal to Load+Base=6.6mA but the VVAsource1 is drawing 41mA! Where are the extra current coming from? REsistance of the power supply?

2. The VVAsource2 automatically sets to a fixed minimum value of 1.35V. Moving the supply know lower won't change the value but is fixed. Why is this? But at around 1.5V, the supply know is now changing its voltage and the current suddenly drop to around 3mA. Why is this?

 

[ericgibbs]

hi,
I have already explained in post #2, why the circuit will NOT work as you are expecting.

 

[blackshadow]

hi,
I have already explained in post #2, why the circuit will NOT work as you are expecting.

ok eric.

i'm now looking into an alternative design using Comparators.

These are now my new goals:

1. I have a reference of 1.0V
2. If Vin is <1.0, i need to supply my load with a fixed voltage source of 2.2V
3. If Vin is >1.0, i need to supply my load with a variable voltage source or simply hook up to a manually power supply.

Can you somehow share a rough draft schematic for this setup using COMparators?

 

[ericgibbs]

hi,
Ok, give me a day, Mondays is always a busy chores day for me.

EDIT:
This is a working version, it needs a little more work, so I have attached the LTS.asc file for you.
The 3 images are with Vvar 0v,3v & 6V.

 

[blackshadow]

hi,
Ok, give me a day, Mondays is always a busy chores day for me.

EDIT:
This is a working version, it needs a little more work, so I have attached the LTS.asc file for you.
The 3 images are with Vvar 0v,3v & 6V.

Great looking design! Thanks eric!
Im gonna study this and will be back at you.

By the way, can you share your library files for the POT at LM393 Comp?

Thanks again..

 

[ericgibbs]

By the way, can you share your library files for the POT at LM393 Comp?

Look here for lots of libs.
**broken link removed**

EDIT:
**broken link removed**

**broken link removed**