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LTSpice amplifier oscillation. Why DC and AC analysis don't match?

Discussion in 'Circuit Simulation & PCB Design' started by Elerion, Jul 8, 2017.

  1. Elerion

    Elerion Member

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    Hello.

    I'm simulating a simple amplifier to be used as input and VAS stages for an audio power amp.
    It uses negative feedback. The gain is 20, fixed by the ratio of R4 / R3.

    I know this kind of circuits usually need some kind of frequency compensation to avoid oscillations.
    The circuit is stable if C3 is >= 3pF.
    If 2pF, or removed, the circuit oscillates.

    But looking at the Bode plot (AC analysis) I don't see any point where phase is 180º and gain avobe unity. Gain goes up, and peaks at around 12,4 MHz (which I don't understand why)

    Now, if we look at the time domain plot, we see 9.35 MHz oscillations (using ".tran 0.5ms").
    If I set the simulation command to ".tran 0.5ms startup", oscillations start before, and are 10,7 MHz instead.

    I would appreciate some help, to understand.
    Thank you.
     

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  2. crutschow

    crutschow Well-Known Member Most Helpful Member

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    That's because you are looking at the closed-loop response.
    You need to look at the open-loop response without AC feedback to see the gain and phase margin.
    That should show why you have that large peak.

    You can view that by placing a very large capacitor (say 1F) across R3.
     
  3. Elerion

    Elerion Member

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    I see about 8,7dB gain in 180º, but at 55 MHz.
     

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  4. dave

    Dave New Member

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  5. crutschow

    crutschow Well-Known Member Most Helpful Member

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    Obviously the closed loop will be unstable since you have no open-loop gain or phase margin, and thus the closed-loop will show a response peak or oscillation (not necessarily at the frequency where the open-loop phase crosses 180°).
    So you need to add compensation until you have an acceptable phase and gain margin (typically more than 5dB and 45°).

    You need to learn more about phase and gain margins in closed-loop systems.
    If you want to know why the closed-loop shows that particular frequency peak you will need to write the transfer function of the amp, and then close the loop and calculate the response.
     
    Last edited: Jul 10, 2017
  6. Elerion

    Elerion Member

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    Yes, I mixed some concepts. I review them, and now I found that a 33pF miller cap grants the circuit enough stability margin. Thanks.

    I still don't understand why at transient simulation I get different oscillation frequencies wheather I se the "startup" parameter or not. Any idea?
     
  7. crutschow

    crutschow Well-Known Member Most Helpful Member

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    Sounds like a quirk of the simulation.
    How it does the initial DC analysis apparently affects the end oscillation.

    If you post your .asc file I can take a look at it.
     
  8. Elerion

    Elerion Member

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    Sure.
     

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  9. crutschow

    crutschow Well-Known Member Most Helpful Member

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    Yes.
    The input capacitor C2 and R7 form a very large time constant of 220 seconds (why so huge?).

    When you do a normal transient analysis it first calculates the DC bias currents to set up the DC bias conditions independent of the time-constants in the circuit.

    When you use the "startup" parameters this bias calculation is not done prior to the start of the transient analysis so it does it during the start of the transient.
    In this case, because of the large time-constant, it takes a long time for C2 and R7 to stabilize (several minutes).

    If you reduce the value of C2 and R7 to give a reasonable time-constant, then you shouldn't see a significant difference in the oscillation frequency after about 5 time-constants have passed.

    I noticed that you use an AC amplitude of 0.5V for your AC analysis.
    You should always use 1V, since the display is calibrated for 1V being 0dB
    This then gives 0dB at the output as a gain of 1.
     
  10. Elerion

    Elerion Member

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    Thank you. I missed that.
    The correct value for the Miller cap is around 1 nF, and not 33 pF as I previously set.
    Phase margin is over 35º, although gain margin is only around 2 dB.
    As this circuit would work on audio frequencies, I could raise the cap value, because bandwith is on the order of 100 kHz, which seems more than enough. Any recommendation?
     

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