We write Embedded C for Freescale MPC561 Micrcontroller. It has 32-bit data bus. It is Big Endian. DATA0 is the most significant bit and DATA31 is the least significant bit.
This microcontroller is wired to external SRAM, Battery Backed RAM, etc.
I instruct this microcontroller to write a byte to a specific address of SRAM as follows:
static void sram_send(unsigned char volatile * const dst,
unsigned char const * src) {
...
..
/* prefetch 4 bytes at once */
long c = *++s;
/* then slam them out one at a time */
*dst = (unsigned_8 char)((c >> 24) & 0xff);
*dst = (unsigned_8 char)((c >> 16) & 0xff);
*dst = (unsigned_8 char)((c >> 8) & 0xff);
*dst = (unsigned_8 char) c;
...
}
Apparently, Microcontroller drives DATA31 to DATA24 when we instruct it to write a byte to SRAM.
DOES THE MICROCONTROLLER DRIVE DATA23 TO DATA0?
Here is the link for MPC561 Microcontroller.
https://www.freescale.com/webapp/sp...48&nodeId=0162468rH3bTdG06C18648&fromPage=tax
This microcontroller is wired to external SRAM, Battery Backed RAM, etc.
I instruct this microcontroller to write a byte to a specific address of SRAM as follows:
static void sram_send(unsigned char volatile * const dst,
unsigned char const * src) {
...
..
/* prefetch 4 bytes at once */
long c = *++s;
/* then slam them out one at a time */
*dst = (unsigned_8 char)((c >> 24) & 0xff);
*dst = (unsigned_8 char)((c >> 16) & 0xff);
*dst = (unsigned_8 char)((c >> 8) & 0xff);
*dst = (unsigned_8 char) c;
...
}
Apparently, Microcontroller drives DATA31 to DATA24 when we instruct it to write a byte to SRAM.
DOES THE MICROCONTROLLER DRIVE DATA23 TO DATA0?
Here is the link for MPC561 Microcontroller.
https://www.freescale.com/webapp/sp...48&nodeId=0162468rH3bTdG06C18648&fromPage=tax