D-flipflop Phase detectors - outputs of Qb and Qa?

[Vitaliy]

It is probably an easy question, but unfortunately all the books I found go only upto 180 degrees in explanation part.

If my phase detector for PLL is D-flipflop with Reset, what what the output be when the input B is lagging input A (reference) by 180 to 360 degrees?

Assume the inputs have same on time (e.g. 5ns) and same period (e.g. 10ns) and the unput A is leading input B by 7.5ns (270 degrees). Should the output Qa stay on until the output Qb goes on, or should it go off after 5ns and then go on after another 5ns, so both outputs would be reset.


Thanks,
Vitaliy

 

[Russlk]

I never heard of using a D flip-flop as a phase detector, what do you use for the clock? Why not use an XOR?

 

[Roff]

I never heard of using a D flip-flop as a phase detector, what do you use for the clock? Why not use an XOR?

I have used a D FF as a bang-bang phase detector (Q output high if D leads clock, low if lagging), but I have never used the reset input.

 

[Vitaliy]

I actually figured everything out. As to why - because the prof wants so. The answer to my question is: for one clock cycle, an output should stay on as long as the other one is off (no matter if phase difference is 10 degrees or 300).

Vitaliy

 

[mstechca]

a better way to make a PLL detector is to take a flip-flop, connect Q to the RESET pin of a 555, make an oscillator out of the 555 timer with components having low tolerance rate (1% or less is good)
connect one input of an XOR gate to the output of a 555 timer Connect the other input to the signal. The signal is also connected to the Set pin of the flip-flop. I am referencing to the 4013 for the flip-flop because it accepts +ve as valid input for the SET and RESET pins.

Now when you run the circuit, if the frequency is NOT the same, as the frequency of the incoming signal, then the output of the XOR gate will output a "1" indicating that the signal is out of sync. If the result keeps changing, chances are that one frequency is a multiple of another frequency.

If you all of the sudden change the frequency of the incoming signal to the correct frequency, the signals could still be out of sync, and XOR will output a 1 and 0 continuously.

You can always apply a logic high to a reset pin to force the circuit to try to sync itself once again with the signal.

there is a way that you can have the circuit automatically try to resync itself (automatic flip-flop reset) if the signal is out of phase. Let's see if you can figure it out.

 

[panic mode]

just lookup quadrature encoder circuit and chances are you will find pair of D flipflops on the input...

**broken link removed**