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XC8 - mixing C and ASM

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Due limitation with free version of XC8 compiler, for critical operations I'm trying to use assembler.
However, it seem that mixing does not work as intended, at least not with latest v1.34.

This is just a bit modified example from XC8 manual, section 5.12.
It seems that it does not return value from ASM routine at all.
Tested with MPLABX and simulator for PIC16F4550 at 20MHz.

Anyone can put some light on this, or this is just plain bug?

main.c
Code:
#define _XTAL_FREQ 20000000

// PIC18F4550 Configuration Bit Settings

// CONFIG1L
#pragma config PLLDIV = 5       // PLL Prescaler Selection bits (Divide by 5 (20 MHz oscillator input))
#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])
#pragma config USBDIV = 2       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2)

// CONFIG1H
#pragma config FOSC = HS        // Oscillator Selection bits (HS oscillator (HS))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = OFF        // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = ON      // USB Voltage Regulator Enable bit (USB voltage regulator enabled)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = ON      // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config ICPRT = OFF      // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)

// Global includes
#include <xc.h>
#include <p18f4550.h>
#include <delays.h>

#define LED LATB


// declare the assembly routine so it can be correctly called
extern unsigned char add(unsigned char a);

void main(void) {
    volatile unsigned char result;
    result = add(5); // call the assembly routine

    LED = result;

    Delay10KTCYx(100);
}

asmtest.asm
Code:
#include <xc.inc>
GLOBAL _add        ; make _add globally accessible
SIGNAT _add,4217   ; tell the linker how it should be called
; everything following will be placed into the mytext psect
PSECT mytext,local,class=CODE,delta=2
; our routine to add to ints and return the result
_add:
    ; W is loaded by the calling function;
    BANKSEL (PORTB)         ; select the bank of this object
    ADDWF BANKMASK(PORTB),w ; add parameter to port
    ; the result is already in the required location (W)so we can
    ; just return immediately
    RETURN
 
Hi!
Firstly you are using the pic18 and not the pic16 mid range as in the example so
"PSECT mytext,local,class=CODE,delta=2"
should be replaced with,
"PSECT mytext,local,class=CODE,reloc=2"
As it has to be word aligned..
Then ( secondly ) The file "mytext.asm" should be preprocessed... In build options add the -P option

Lastly... The asm is for a mid range pic... I'm not high up on pic18 assembly.. Just check that you asm code is assembling correctly... See if the "banksel" makro is available... Enhanced and pic18 use a BSR for bank switching "MOVLB x"..
 
Thank you very much!

The "reloc=2" solved the main issue. For rest I would need read ASM PIC18 documentation.
Yes, I'm using PIC18F4550, not PIC16F4550 (which is non existed)...

Thank you once again!
 
Last edited:
The Banksel is not used on the 18F series, the MOVLB is used in conjunction with LFSR's to access the data memory bank.
Check out the 18C/F migration manual DS39532A
Max.
 
Yes, I'm aware of it, thanks.

Actually, already finished what I needed...

BANKSEL() is actually automatically translated to MOVLB as well as BANKMASK().
There is no too much change at first stage translation, except a bit juggling here with variables (another functions I have needed).
 
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