;==========================================================================
;
; Configuration Bits
;
;==========================================================================
_FCMEN_ON ;Fail-Safe Clock Monitor is enabled
_FCMEN_OFF ;Fail-Safe Clock Monitor is disabled
_IESO_ON ;Internal External Switchover mode is enabled
_IESO_OFF ;Internal External Switchover mode is disabled
_BOD_ON ;BOR enabled
_BOD_OFF ;BOR disabled
_CPD_ON ;Data memory code protection is enabled
_CPD_OFF ;Data memory code protection is disabled
_CP_ON ;Program memory code protection is enabled
_CP_OFF ;Program memory code protection is disabled
_MCLRE_ON ;GP3/MCLR pin function is MCLR
_MCLRE_OFF ;GP3/MCLR pin function is digital input, MCLR internally tied to VDD
_PWRTE_OFF ;PWRT (Power-up timer) disabled
_PWRTE_ON ;PWRT enabled
_WDT_ON ;WDT enabled
_WDT_OFF ;WDT disabled and can be enabled by SWDTEN bit of the WDTCON register
_LP_OSC ;LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
_XT_OSC ;XT oscillator: Crystal/resonator on GP4 and GP5
_HS_OSC ;HS oscillator: High-speed crystal/resonator on GP4 and GP5
_INTOSCIO ;INTOSCIO oscillator: I/O function on GP4 pin, I/O function on GP5
_INTOSC ;INTOSC oscillator: CLKOUT function on GP4 pin, I/O function on GP5