list p=16f84a
#include <P16F84A.INC>
__CONFIG _WDT_OFF & _PWRTE_OFF & _CP_OFF & _XT_OSC
; *** Setup the constants ***
ISR_ADDR equ 0004h ; ISR address
TMR0_RELOAD equ b'00000000' ; Reload value of Timer 0
LEFT_MOTOR equ 0Fh ; Location of current step of left motor
RIGHT_MOTOR equ 10h ; Location of current step of right motor
COUNTER1 equ 11h ; First counter for delay
COUNTER2 equ 12h ; Second counter for delay
; *** Macros ***
bank0 macro ; Select memory Bank 0
bcf STATUS, RP0
endm
bank1 macro ; Select memory Bank 1
bsf STATUS, RP0
endm
; *** Begin program execution
org 0000h
goto Main
; *** Interrupt Service Routine
org ISR_ADDR
bcf INTCON, T0IF ; Clear Timer 0 overflow flag
decfsz COUNTER1, 1
goto End_ISR
call Forward ; Call subroutine to go forward
End_ISR call Reset_TMR0 ; Reset Timer 0
call Move_Motors
retfie
; *** Subroutines
Reset_TMR0 movlw TMR0_RELOAD
movwf TMR0
return
Turn_Right bcf STATUS, C ; Clear Carry flag
rrf LEFT_MOTOR, 1 ; Create a single step for left motor
btfsc STATUS, C ; Is C set?
bsf LEFT_MOTOR, 3 ; Yes, set bit 3 of LEFT_MOTOR
bcf STATUS, C ; Clear Carry flag
return
Turn_Left bcf STATUS, C ; Clear Carry flag
rlf RIGHT_MOTOR, 1 ; Create a single step for right motor
btfsc STATUS, C ; Is C set?
bsf RIGHT_MOTOR, 4 ; Yes, set bit 4 of RIGHT_MOTOR
bcf STATUS, C ; Clear Carry flag
return
Forward call Turn_Right
call Turn_Left
return
Move_Motors movf RIGHT_MOTOR, 0 ; Place current step of left motor in W
iorwf LEFT_MOTOR, 0 ; OR W with the current step of right motor
movwf PORTB ; Move the current step to Port B
return
; *** Main Program ***
Main call Reset_TMR0
; Setup stepper motor movements
bsf LEFT_MOTOR, 3 ; Set initial step for left motor
bsf RIGHT_MOTOR, 4 ; Set intitial step for right motor
; Setup I/O ports
bank1
movlw 00h ; Set W register to zero
movwf TRISB ; and Port B to be an output port
bank0
; Setup interrupts
bsf INTCON, T0IE ; Setup Timer 0 overflow interrupt
bsf INTCON, GIE ; Enable occurrence of interrupts
; Setup Timer 0 interrupt to respond to internal clock
bank1
bcf OPTION_REG, T0CS ; Timer 0 Clock source is internal clock
bank0
This goto This
end