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virtual ground and its common problem

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Anniyan_x

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hi i have analog current input card that have 2 modes, passive ( need to power the sensor connected to it by external power supply) and active mode, sensor will be power using cards internal supply. the problem is when using in either (active or passive) modes using same sensor the outputs have a slight voltage shift where-byright in both modes it should be the same. this cause different sensor readings and by right the reading should same no matter in what modes the cards is being used. after some analysis i find that, please refer below circuit:-

View attachment 67270

the voltage point labelled 1.4Off has a voltage shift of 0.003v when used in active mode.

This virtual ground circuit (thats what it is called i guess, using opamp) has voltages divider on its +input which divide the Vref into half and provides this voltage as an input to virtual ground opamp's +input. This opamp configurations then generates a stable voltage on the -ve input side which is then used as an offset volatage. and this offset gets shifted (+0.003) when using in active mode(using internal supply to power the sensors connected to the card)

for e.g in passive mode 1.4Off => 1.4volts
in active mode 1.4Off => 1.403

---------------------------------------------------------------------------------------------------

the above was confirmed when this measurements where taken to indentify the root cause.

the measure results was taken at this circuit(final circuit on the analog signal chain before fed to ADC:-

View attachment 67271

and the results as below:-

View attachment 67272

from the results we can see the difference in output of the (active vs passive) whereby in the active mode the has voltage shift of aproxx 0.003/4 and it is consistent.
does anybody have hints on why this might occur and the tips about common issue regarding using virtual ground in opamp to provide stable voltage output.
 
Hi,

With a quick inspection it appears that all the resistors are 1 percent tolerance. These resistors set the gain and offset so it could just be that one or more of the resistors are not correct even though they are still within their package stamped tolerance.

1 percent of 1.000 is 10mv, so adding that we get 1.010 volts, which is more than what you are seeing so it is very likely that there is a natural mismatch in the resistors somewhere.

To fix this you'd have to find out which resistor can be changed such that you get the same gain but a more accurate offset. This could probably be accomplished by paralleling another 1 percent resistor (of higher value) with one of the resistors and thus bringing down the total resistance by a small amount (probably around 0.3 percent).
As an approximation, to bring a 100k resistor value down by 1 percent we'd have to place a 10 Meg resistor in parallel with it. To bring it down by 0.3 percent we'd have to go three times higher, to 30 Meg. That would drop the resistance by roughly 0.3 percent.
I mention paralleling because that's easier to do, but you may have to go in series because 30M resistors might be hard to find for example. In series, you simply add 1 percent of the resistor value, or in this case, 0.3 percent, which would be 300 ohms for a 100k resistor.
I dont recommend using a pot except as a trial and error method which later to be replaced by a fixed resistor of the same makeup and tolerance.

This is assuming you dont use the circuit for what you call the 'passive' mode and you do use the circuit for what you call the 'active' mode. If this is not true, then you'll have to show the switching for going from passive to active so we can see what exactly changes that is supposed to change so we can analyze what is changing that is not supposed to change. We're only seeing part of the circuit right now so it's hard to tell.
 
Last edited:
Hi,

With a quick inspection it appears that all the resistors are 1 percent tolerance. These resistors set the gain and offset so it could just be that one or more of the resistors are not correct even though they are still within their package stamped tolerance.

1 percent of 1.000 is 10mv, so adding that we get 1.010 volts, which is more than what you are seeing so it is very likely that there is a natural mismatch in the resistors somewhere.

To fix this you'd have to find out which resistor can be changed such that you get the same gain but a more accurate offset. This could probably be accomplished by paralleling another 1 percent resistor (of higher value) with one of the resistors and thus bringing down the total resistance by a small amount (probably around 0.3 percent).
As an approximation, to bring a 100k resistor value down by 1 percent we'd have to place a 10 Meg resistor in parallel with it. To bring it down by 0.3 percent we'd have to go three times higher, to 30 Meg. That would drop the resistance by roughly 0.3 percent.
I mention paralleling because that's easier to do, but you may have to go in series because 30M resistors might be hard to find for example. In series, you simply add 1 percent of the resistor value, or in this case, 0.3 percent, which would be 300 ohms for a 100k resistor.
I dont recommend using a pot except as a trial and error method which later to be replaced by a fixed resistor of the same makeup and tolerance.

This is assuming you dont use the circuit for what you call the 'passive' mode and you do use the circuit for what you call the 'active' mode. If this is not true, then you'll have to show the switching for going from passive to active so we can see what exactly changes that is supposed to change so we can analyze what is changing that is not supposed to change. We're only seeing part of the circuit right now so it's hard to tell.

thanks alot..il first try the resistor changing method to get more acurate offset but get the same gain.
 
for starters, the op amp will have some offset because of the input bias currents being terminated through different value resistors. this will cause offset voltages to appear across the input. second, you should NEVER apply an input voltage to an op amp that is powered off unless you have some way of protecting the input stages from forward biasing their unpowered input transistors.
 
I think that you might look for a difference in the sensor's ground wire current. Powering the sensor locally will cause a ground current through the ground wire. The wire's resistance is finite. There will be a voltage drop across the wire, easily shifting the voltage 3 millivolts.
 
Last edited:
I think that you might look for a difference in the sensor's ground wire current. Powering the sensor locally will cause a ground current through the ground wire. The wire's resistance is finite. There will be a voltage drop across the wire, easily shifting the voltage 3 millivolts.


if thats the case, what is the best practice to solve it??
 
what are you measuring? why does the reading have to be accurate to within 0.1% your voltage shift is 0/3% and you have 1% tolerance resistors in the circuit..... in the calibration business, if a system uses 1% tolerance components, a 0.3% error is acceptable.
 
I think that you might look for a difference in the sensor's ground wire current. Powering the sensor locally will cause a ground current through the ground wire. The wire's resistance is finite. There will be a voltage drop across the wire, easily shifting the voltage 3 millivolts.

what are you measuring? why does the reading have to be accurate to within 0.1% your voltage shift is 0/3% and you have 1% tolerance resistors in the circuit..... in the calibration business, if a system uses 1% tolerance components, a 0.3% error is acceptable.

hi all the root was finded out, in the board design there was a layout issue on the ground plane of power block.... in sense tht a part of ground plane poligon was removed by the layout designer which cause this instability issue... so when in active mode the on board 24v isolated supply cause interferences to the analogue reading( noise coupled to the analog front end circuits).... when in passive mode, it works fine coz the 24v isolated supply is off now(so no interferens from the 24v)... this ground plane (polygon) is for the isolated24v power supply block which reduces noise cause by the switching power supply..., so when reading but this makes both the active and passive mode have different value although we inject same current level.
so now have to redesign the layout of the board and add a ground pologon around the 24v power supply block to reduce the interferens/switching noise.
 
Hi,

With a quick inspection it appears that all the resistors are 1 percent tolerance. These resistors set the gain and offset so it could just be that one or more of the resistors are not correct even though they are still within their package stamped tolerance.

1 percent of 1.000 is 10mv, so adding that we get 1.010 volts, which is more than what you are seeing so it is very likely that there is a natural mismatch in the resistors somewhere.

To fix this you'd have to find out which resistor can be changed such that you get the same gain but a more accurate offset. This could probably be accomplished by paralleling another 1 percent resistor (of higher value) with one of the resistors and thus bringing down the total resistance by a small amount (probably around 0.3 percent).
As an approximation, to bring a 100k resistor value down by 1 percent we'd have to place a 10 Meg resistor in parallel with it. To bring it down by 0.3 percent we'd have to go three times higher, to 30 Meg. That would drop the resistance by roughly 0.3 percent.
I mention paralleling because that's easier to do, but you may have to go in series because 30M resistors might be hard to find for example. In series, you simply add 1 percent of the resistor value, or in this case, 0.3 percent, which would be 300 ohms for a 100k resistor.
I dont recommend using a pot except as a trial and error method which later to be replaced by a fixed resistor of the same makeup and tolerance.

This is assuming you dont use the circuit for what you call the 'passive' mode and you do use the circuit for what you call the 'active' mode. If this is not true, then you'll have to show the switching for going from passive to active so we can see what exactly changes that is supposed to change so we can analyze what is changing that is not supposed to change. We're only seeing part of the circuit right now so it's hard to tell.

hi all the root was finded out, in the board design there was a layout issue on the ground plane of power block.... in sense tht a part of ground plane poligon was removed by the layout designer which cause this instability issue... so when in active mode the on board 24v isolated supply cause interferences to the analogue reading( noise coupled to the analog front end circuits).... when in passive mode, it works fine coz the 24v isolated supply is off now(so no interferens from the 24v)... this ground plane (polygon) is for the isolated24v power supply block which reduces noise cause by the switching power supply..., so when reading but this makes both the active and passive mode have different value although we inject same current level.
so now have to redesign the layout of the board and add a ground pologon around the 24v power supply block to reduce the interferens/switching noise.
 
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