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USB to RS232 Circuit FT232R

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Bruce Glazier

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Hi Guys,
I have my complete USB to RS232 circuit design complete, built and tested. Problem I am having with it though is that transmit from the PC does not work properly, comes across as the wrong key. The RX piece back to the computer works perfectly. Attached is the circuit diagram. I really appreciate any suggestions as I am on a tight deadline to get this fixed. Thank you!

J1 - MiniUSB port
U13 - FT232R (SSOP Packag) https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT232R.pdf
U14 - ADM3312E https://www.analog.com/media/en/tec...a-sheets/ADM3307E_3310E_3311E_3312E_3315E.pdf
J2 - Serial Port to Deviceusbtors232.PNG
 
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Have you scoped a byte yet? Using any flow control?
Parity? You should.
Cable quality? CM choke? Termination?
Speed*length product?


Key? Which bits in error?
 
Some more information:
Attached is a picture of what a capital letter J should look like as RS232 and a scope picture of what my letter J looks like.
Note that in mine there there is not a parity bit at the end, also that my levels only range from -6V to +6V...could that range be an issue? I have no idea on the parity bit thing.
how-rs232-works-tx-diag.png

IMG_0219.JPG
 
The waveform of the RS232 signal looks very distorted. Have you compared it with the input to the level converter on pin 7 to see if it is distorted there. Your circuit does not show a capacitor between Vcc (Pin 3) and V+ (Pin 1) Also you do not seem to have any decoupling capacitors between Vcc and ground. This could prevent the voltage tripler part of the chip from working correctly. You could also look a V+ (Pin 1) with the scope to see that you have a smooth 9 volts or so there.

Edit. I have just noticed that the capacitor between V- (Pin 21) and ground is also missing. Pin 21 should be a smooth -9 volts.
 
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Yes, lots of capacitors missing on the ADM3312 supplies.
Have a look at figure 3 in the ADM datasheet and modify your circuit accordingly.

JimB
 
What's important to remember about looking at signal quality on RS-232 is it not the best case p-p voltage that counts but the worst case... in which case all you show is +/- 3 to 4 V, which means loss of margin.

But the real threshold for ALL Rs-232 is the same as TTL which is ~1.3V ( 2x Vbe drops )

Imagine the start bit edge is when the clock synchronizes with a 16x clock then samples the 8/16th internal clock sample supposedly in the middle of the bit. Notice your rise time is horribly slow except the last bit (?) THis may be controlled by the 47pF caps being a little too big. or more likely to missing details in your copy of the design, lack of proper clean +/-6V..
Fix the supply rails.
 
Tony, The 47 pf caps are on the USB signals not the serial data. It was the very poor waveform that made me suspect supply decoupling. It was then I also noticed the missing capacitor on the V+ (And later on the V-) This then fitted in with the signal only being +/- 6 volts. The voltage tripler was only working as a doubler due to the missing capacitors.
 
Sorry for not responding sooner but I have been so busy. Thanks for everyone's help on this, you guys were absolutely right!
I placed three caps that I can't believe I missed and the signal smoothed out and reached the correct levels.
The datasheet for the FT232R states to place a 100nF cap from the 3.3V output to ground.
The datasheet for the ADM3312E shows one 0.1uF cap from +V to VCC and a 0.1uF cap from V- to GND.
Decoupling caps are common practice but I completely overlooked them being in such a rush to finish this.

Thanks again,
Bruce
 
Good to hear a success story, thankyou.

JimB
 
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