I having troubling understand what other interrupt firing high_isr besides TMR2 on PIC18f4550.
Way I detect it I set pin MY_DBG_PIN toggling everytime high_isr is activated, and from what I try to do, only TMR2 I have activated and nothing else.
My code looking like:
As can see, only TMR2 possibly fire ISR, but then do you notice high freq. update of debugging pin if you uncomment the line?
If I specify TMR2 interrupt flag in ISR and then toggle debugging pin, then expected update freq, as current active code is like.
What other thing can be triggering ISR and how I check that without checking flags of all interrupts?
Way I detect it I set pin MY_DBG_PIN toggling everytime high_isr is activated, and from what I try to do, only TMR2 I have activated and nothing else.
My code looking like:
Code:
#include <p18f4550.h>
#define USE_OR_MASKS
#include <pwm.h>
#include <timers.h>
#pragma config PLLDIV = 10
#pragma config FOSC = ECPLLIO_EC
#pragma config PWRT = OFF
#pragma config BOR = OFF
#pragma config MCLRE = ON
#pragma config PBADEN = OFF
#pragma config ICPRT = OFF
#pragma config LVP = OFF
#pragma config WDT = OFF,DEBUG=OFF
/* Sets the PWM value on CCP1 to 50% duty cycle*/
#define MY_DBG_PIN LATBbits.LATB1
#define MY_DBG_PIN_TRIS TRISBbits.TRISB1
#pragma interrupt high_isr
void high_isr (void)
{
//* Comment to notice toggling of MY_DBG_PIN at 0.7Mhz
if(PIR1bits.TMR2IF) // Timer 2 interrupt
{
MY_DBG_PIN = 0;
PIR1bits.TMR2IF = 0;
}
//*/
// Are some other interrupts also firing? Why?
//MY_DBG_PIN = 0; // If uncomment, toggling at 0.7Mhz
}
#pragma code high_vector=0x08
void interrupt_at_high_vector(void)
{
MY_DBG_PIN = 1;
_asm GOTO high_isr _endasm
}
#pragma code /* return to the default code section */
void main (void)
{
TRISC=0;
OpenTimer2(TIMER_INT_ON | T2_PS_1_4 | T2_POST_1_16 );
OpenPWM1( 149 );
SetDCPWM1( 300 );
MY_DBG_PIN_TRIS = 0; // make it an output
PIE1bits.TMR2IE=1; //enable Timer2 interrupt
INTCONbits.PEIE=1; //enable peripheral interrupts
INTCONbits.GIE=1; //enable glogal interrupts
INTCONbits.GIEH = 1; /* Enable global Interupt */
while(1)
{
}
}If I specify TMR2 interrupt flag in ISR and then toggle debugging pin, then expected update freq, as current active code is like.
What other thing can be triggering ISR and how I check that without checking flags of all interrupts?