Sync signal not output on Novelda X4 SoC

[yxnan]

I am woking on a multiple radar system, which consists of one master and several slaves, all of which use a X4 UWB SoC.

When dealing with multiple devices, a sync signal is needed to be generated on the master to inform the slave devices to start a sample sequence. To be exactly, this signal is called trx_start_sync_out in their datasheet.

In the datasheet it states as following:

The master generates trx_start_sync_out from its internally synchronized trx_start signal. ... trx_start_sync_out can be
output on IO1 and/or IO3 by clearing the io1_spi_sel and/or io3_spi_sel bits in the io_ctrl_5 register as long as
the corresponding bit in the io_gpio_sel segment of the io_ctrl_3 register is cleared.

The problem is, I did all steps that the datasheet told me what I supposed to do, but this signal just wouldn't output from IO3. I tested other functionalities of the chip and can confirm the chip is not broken. I wonder if anyone has used this chip in a multiple radar system, and have you also met this issue?

 

[rjenkinsgb]

It's not a device I've heard of before.

I'm guessing this is the data sheet you are working from?

https://novelda.com/wp-content/uploads/2021/01/NOVELDA-x4-datasheet-revF.pdf

Do you have the refclk signal connected from master to the slaves, as it says?

What construction are you using? Some kind of development boards, or have you assembled PCBs?

 

[yxnan]

Thanks for replying.
Yes, that is the datasheet I was referring to, and the refclk (and other clock management setups) is connected as it says.

I'm using a evaluation board X4M03 from Novelda, it consists of a X4 chip, an antenna board, and an Atmel ATSAMS70 MCU on it.

They also provided a firmware library called XeThru Embedded Platform (XEP) which contains the FreeRTOS with the HAL and X4 driver in it, and users are supposed to build the application on top of it. Everything else works fine, but it bothers me that there is a piece of 8051 firmware code (near 2000 bytes) that is programmed into the X4 SoC every time the system starts, but no documents or comments about its functionality, so I am trying to decipher what this code is really doing. Otherwise there is no community or other materials about the Novelda's products so there are not many things I can do.