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Strange use of Logic gates!?

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PConst167

Member
Hey friends,

can you explain to me what is happening to this circuit. In IC8B, Why is the circuit connecting to the XOR gate in that way? It seems the inputs to the XOR gates are "A and not A". Why do that ? Also the result would always be true. What's happening please?? Why would anyone do this ? The result is always true except when there is some delay in the signals and the XOR gate oscillates..

While writing this I think I understood it. It is to create a very small pulse. Right ?

 

spec

Well-Known Member
Most Helpful Member
Hey friends,

can you explain to me what is happening to this circuit. In IC8B, Why is the circuit connecting to the XOR gate in that way? It seems the inputs to the XOR gates are "A and not A". Why do that ? Also the result would always be true. What's happening please?? Why would anyone do this ? The result is always true except when there is some delay in the signals and the XOR gate oscillates..

While writing this I think I understood it. It is to create a very small pulse. Right ?

Hi PC,

You got it in one. The circuit is a narrow pulse generator using the propagation delays of IC3D, IC3E and IC3F.

This is a fairly common technique.

spec
 

PConst167

Member
Hi PC,

You got it in one. The circuit is a narrow pulse generator using the propagation delays of IC3D, IC3E and IC3F.

This is a fairly common technique.

spec

Hi Spec! I looked at it for a while and I was mesmerized at it. Who would possibly do such thing! Then I realized it would create a pulse :p

Is it reliable ?
 

AnalogKid

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Very. The output pulse width will vary with temperature, because all of the propagation delay times vary with temperature. But if the three inverters and the 86 all are the same technology (LS, HC, etc.) then the 86 always will be fast enough to catch the time delay. The 86 output sits high, and makes a narrow negative pulse for each positive and negative edge of the IC4D output signal.

When designing with a CPLD or FPGA, this is a common trick to differentiate an internal signal because there are no coupling capacitors inside those parts.

ak
 

spec

Well-Known Member
Most Helpful Member
Hi Spec! I looked at it for a while and I was mesmerized at it. Who would possibly do such thing! Then I realized it would create a pulse :p

Is it reliable ?
Hi PC,

Yes, it is reliable and, as I said, it is often used.

To be more specific, the leading edge of the XOR gate produces a narrow pulse which has a leading edge coincident with the point of change of the input square wave, plus the propagation delay of the XOR gate.

The pulse length of the XOR gate output can be extended by introducing more delay to the signal path of one of the XOR gate inputs. This can be done with a resistor and capacitor at a Schmitt trigger gate input.

In spite of the longer pulse the leading edge of the XOR gate output will still be just as coincident with a change in the input wave form.

This circuit is often use in frequency doubling, the output from the XOR gate having twice the frequency of the input waveform.

spec

(our posts crossed AK)
 
Last edited:

PConst167

Member
Hi PC,

Yes, it is reliable and, as I said, it is often used.

To be more specific, the leading edge of the XOR gate produces a narrow pulse which has a leading edge coincident with the point of change of the input square wave, plus the propagation delay of the XOR gate.

The pulse length of the XOR gate output can be extended by introducing more delay to the signal path of one of the XOR gate inputs. This can be done with a resistor and capacitor at a Schmitt trigger gate input.

In spite of the longer pulse the leading edge of the XOR gate output will still be just as coincident with a change in the input wave form.

This circuit is often use in frequency doubling, the output from the XOR gate having twice the frequency of the input waveform.

spec

(our posts crossed AK)


What if you only want the pulse to exist when the input goes from low to high and not from high to low? The XOR will produce the pulse in both cases!
 

spec

Well-Known Member
Most Helpful Member
What if you only want the pulse to exist when the input goes from low to high and not from high to low? The XOR will produce the pulse in both cases!
Just use a different circuit. If you like, and I can remember, I will post one.:)

spec
 

JimB

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spec

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Propagation delay is also used when you connect the /Q output of a D type flip flop to the D input to form a divide by two.

In this case you are relying of the propagation delay, CK to /D, so that the D type flip flop does not read changing data on its D input.

In the cases that have been described so far on this thread, propagation delays are useful but in most cases they are a pain in the butt.:eek:

spec
 

AnalogKid

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What if you only want the pulse to exist when the input goes from low to high and not from high to low? The XOR will produce the pulse in both cases!
Keep the inverters, but replace the XOR gate with a AND or OR (or NAND/NOR for the opposite output pulse polarity). It is a pretty simple truth-table exercise.

ak
 

PConst167

Member
Very. The output pulse width will vary with temperature, because all of the propagation delay times vary with temperature. But if the three inverters and the 86 all are the same technology (LS, HC, etc.) then the 86 always will be fast enough to catch the time delay. The 86 output sits high, and makes a narrow negative pulse for each positive and negative edge of the IC4D output signal.

When designing with a CPLD or FPGA, this is a common trick to differentiate an internal signal because there are no coupling capacitors inside those parts.

ak

Thanks AK. Very interesting. How do you eliminate the pulse created at the negative edge of the input though? Because it does create pulses for both edges...
Keep the inverters, but replace the XOR gate with a AND or OR (or NAND/NOR for the opposite output pulse polarity). It is a pretty simple truth-table exercise.

ak

Tried that. Need an even number of inverters for the AND one but it works! Thanks AK :)

This is very interesting, wow, I had no idea dirty tricks like this could be used :p Are there any more dirty tricks like this one? :p I'm just kidding, this seems pretty legitimate.
 

PConst167

Member
This off topic but I have to say I'm so in love with electronics. I started out in mathematics for many years and I had no idea electronics was such a wonderful subject!
 

spec

Well-Known Member
Most Helpful Member
This off topic but I have to say I'm so in love with electronics. I started out in mathematics for many years and I had no idea electronics was such a wonderful subject!
Quite a few people here are bitten by the electronics bug on ETO.:)

But mathematics is the language of the universe and electronics depend very heavily on mathematics so you are the ideal person to have a go at electronics.

Your concern about relying on gate delays for a particular function is valid- the gate data sheet only gives the maximum propagation delay, not minimum so in theory, a gate could have zero propagation delay and still meet its specification. But a zero gate delay is a physical impossibility.:)

You ask ask about other similar techniques- yes there are many dodges and rules-of-thumb in all fields of electronics: digital, analogue, RF, Power... and even software.

spec
 

AnalogKid

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Most Helpful Member
Are there any more dirty tricks like this one?
The most popular communications circuit in the world is the analog mixer, the heart of every AM and FM radio, TV receiver, etc. When you combine two sinewaves of different frequencies (such as the input from an antenna and a local oscillator), the output is a composit waveform that contains both the sum of the two frequencies and the difference of the two frequencies. In this way you can shift a frequency channel up and down the spectrum, such as moving a 100 MHz FM signal down to 10.7 MHz where it is much easier to amplify, filter, and process.

You can do the same thing for two digital signals with a flip-flop.

ak
 
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