What you asked should take days in class to understand. Here is a short answer.
PLD: "logic" There are some inputs. In this picture 0 through 35. These signals (and the inverse) run across the die.
Look at the top line going into the AND gate "PT0" that has 72 inputs.
If you want "PT0" = /IN0 then only fuse on the right is closed. All other are open.
If you want PTO=IN0 then only fuse next to right is closed. All other are open.
PT0 can = IN0+/IN5+IN7 By the fuses.
If you want "PT0" to be logic 0 then open all fuses.
If you want PT0 to be 1 then close all the fuses. (AN0 + /AN0=1)
Look at the 5 input OR gate.
OUTPUT=(PT0*PT1*PT2*PT3*PT4) Where PT0---PT4 can be 0 or any AND function of the 35 inputs. (and /input)
Example OUT= (IN0+IN5+/IN7)*(/IN0+IN3+IN8)*IN35
Here you get to
choose if you logic has a FF in it or just logic. The I/O pin is on the right side. The AND gates and IN pins (not shown) are on the left side. The "XOR" is used to make the function OR or NOR.
A PLD will probably have 8 of these logic blocks. Much of the part is AND gate fuses. All inputs and most output go to the AND fuses.
CPLD: Example: There is a block just like above. (8 functions (FF or logic) and many inputs. The big difference is that are are many of these blocks. Maybe there are 4 (8 function PLD) in one IC. In the CPLD each FF does not go out to a pin. A "function" goes to a routing area where it can go to a pin or stay inside and go to another function.
Here is a picture of a CPLD with 4 PLDs inside.
FPGA: There are many different types of parts but there is a typical part.
There are only a small number of inputs to a function. Not like a PLD where all inputs go to a function.
There might be 100s or 1000s of blocks like below. Each made up of 4 smaller blocks.
F: This is a logic function. There are 4 inputs and 1 output.
When programming you get to decide what output (1 or 0) you want for all 16 possible inputs.
Switch: There is a triangle function that is a switch. 2 inputs and 1 output. You get to choose which input connects to the output.
FD: This is a data flip flop.
What can it do?
X=F1+/F2*F4 -----No FF
Q=/F1*F2 ------Data FF is used.
There is a complex way to get a signal from a pin to a function. Sorry I can't find a good picture.
The little squares are logic blocks like above.
The blue area
s are wires. Usually a combination of long wires that go all the way across the IC and short wires that go only a short distance.
There is a process much like laying out a PCB where a signal might travel across the IC on a long wire. The jump to a short wire and then another short wire to get to a logic block. The output might use a short wire to get to another logic block and that output might take several wires to get to a output pin.