Simple question on d-types...

Hi,

I know this is basic stuff but I would like clarification on what active high and active low means when using d-types? In a project I have made a 3 bit counter with the set and reset pins high and I need to explain why the counter works in this config.!!

All help welcome!

thanx

Maybe this help....

elec123 said:

Hi,

I know this is basic stuff but I would like clarification on what active high and active low means when using d-types? In a project I have made a 3 bit counter with the set and reset pins high and I need to explain why the counter works in this config.!!

All help welcome!

thanx

Click to expand...

You did not say which D Type you are using. But it would appear to be one that has Active Low Set and Reset.

This means that the Flip Flop will be set by a Low on its Set input and reset by a Low on its Reset input.

The outputs Q and Q bar are Active High (AH) and Active Low (AL) respectively. This means that when the FF is set, Q is High and Q bar is Low.

If you consider a NAND gate, when performing the AND function, it has AH inputs and an AL output.

However, if you look at the truth table of a NAND gate, you will observe that it can also be used as an OR gate if the inputs are defined as AL and the output as AH.

All gates have this duality. eg. an AND gate can be used as an OR gate if its outputs and inputs are defined as AL. See the attachment for more detail.

Len

I'm using 74LS74 which contains 2 d types, could you confirm this chip had active low set and reset? also I'm not sure what you meant by when FF is set, could you clarify this?

Cheers

"set" means Q output is made high, "reset" or "clear" means Q is made low. Of course NOTQ is the opposite.