Simple LED Analog Clock Idea

//`#start header` -- edit after this line, do not edit this line
// ========================================
//
// Copyright YOUR COMPANY, THE YEAR
// All Rights Reserved
// UNPUBLISHED, LICENSED SOFTWARE.
//
// CONFIDENTIAL AND PROPRIETARY INFORMATION
// WHICH IS THE PROPERTY OF your company.
//
// ========================================
`include "cypress.v"
//`#end` -- edit above this line, do not edit this line
// Generated on 06/08/2021 at 10:16
// Component: Shift64
module Shift64 (
    output [63:0] dataout,
    output  serout,
    input   clkin,
    input   clrall,
    input   loadall,
    input   serin,
    input   setall
);
    parameter InitPatt = 0;

//`#start body` -- edit after this line, do not edit this line


//    wire [63:0]paraout64;
    reg  [63:0] sreg;                              // actual register

    assign dataout = sreg;
    assign serout = sreg[0];
   
    // reset and load are both syncronous
    always @ (posedge clkin )
   
    begin
   
        if (clrall == 1'b1)                         // clear / reset has precedence
   
            sreg <= 64'h0000000000000000;
       
        else
       
        if (setall == 1'b1)
       
            sreg <= 64'hFFFFFFFFFFFFFFFF;           // set shift reg to all 1's
       
        else
       
        if (loadall == 1'b1)                        // Load user preset/config data
       
            sreg <= InitPatt;
           
        else
       

            sreg <= { serin, sreg[63:1] };          // Do a one bit shift and take in SerIn bit
   
    end

//`#end` -- edit above this line, do not edit this line
endmodule
//`#start footer` -- edit after this line, do not edit this line
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