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SEPIC converter design

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Here are the waveforms after the stabilization at the desired output voltage level :

current on L24 :
L24current.png


gate voltage :
gateVoltage.png

gateVoltage2.png

drain voltage :
drainVoltage.png

and the diode anode voltage :
anodeVoltage.png
 
These voltage wavforms look reasonable for an open loop converter. The L24 current looks excessive, although I don't know what your load is.

But the voltages within the waveforms are nowhere near those on your schematic of post #3

What's changed?


PS. The time windows shown are wider than is useful to see the basic operation. I'd prefer a window of 5 or 10 cycles.
 
These voltage wavforms look reasonable for an open loop converter. The L24 current looks excessive, although I don't know what your load is.

But the voltages within the waveforms are nowhere near those on your schematic of post #3

What's changed?


PS. The time windows shown are wider than is useful to see the basic operation. I'd prefer a window of 5 or 10 cycles.
The load is three DC-DC converters connected on the output of the SEPIC.

I didnt change many things. Post #3 is to show the schematic so dont pay attention to the voltages.

In respect to the time, for what time for example you suggest to run?
 
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