I'd like to implement an external RESET Button - A simple pull-up swtich, that is connected to the RESET_N pin of the MCU, and when pressed, it grounds the RESET_N pin.
My problem is that I'm afraid that spikes in the VDD of the swtich, will lower the voltage of the RESET_N pin, and therefore will create an unwanted External reset to the MCU, caused by that RESET_N pin.
(I should add that according to datasheet, the RESET_N pin needs to be pulled down to a minimum time of 250ns in order to completely reset the MCU).
Is there anyway for the MCU to know for how long the RESET_N pin's votlage was pulled down to ground?
My problem is that I'm afraid that spikes in the VDD of the swtich, will lower the voltage of the RESET_N pin, and therefore will create an unwanted External reset to the MCU, caused by that RESET_N pin.
The 47K resistor / 10nF capacitor will filter noise on Vdd from the reset input. If the noise on Vdd is so bad that it can get through the RC network and drive the reset line low long enough to reset it you should fix the noise on the supply.
Thank you.
Lowering the spikes amplitude is of course the best solution.
The spikes are caused when switching ON and OFF high loads (up to 4KW @ 16A loads).
I'm afraid of RESET_N pin being grounded from happennig because I use that reset button in order to let the MCU know that it needs to reset external devices that are placed on PCB and to erase external flash (MCU knows to disicriminate between Power-On Reset and RST_N Reset).
My questions are:
1. Is there any way for the MCU to know for how long the RESET_N pin was grounded?
With that, I could have the MCU to erase Flash and reset other devices only after 10 seconds press for example.
2. Are there any other ways to overcome the problem of unwanted RST_N resets?
My questions are:
1. Is there any way for the MCU to know for how long the RESET_N pin was grounded?
With that, I could have the MCU to erase Flash and reset other devices only after 10 seconds press for example.
Don't know that CPU in detail, what does the data sheet say? Seems unlikely since the whole point of a reset is to reset it, why would anything care how long it was reset. It would seem better to use a normal I/O line to monitor a switch
2. Are there any other ways to overcome the problem of unwanted RST_N resets?
Provide adequate filtering on the reset signal for the level of noise expected, or use more complex external reset circuit than the simple R/C switch you're currently using.
I could recommend something that is inadequate for the noise level, or something that is over-complex since I don't know your circuit designs, your layout or your noise levels.
I assume that using larger capacitor than 10nF is dangarous becuase as you can see, a press discharges the capacitor directly to ground.