Hello,
The answer is absolutely without a doubt definitely maybe there might be a possibility
To find the answer, simply experiment with a 1 bit model. That would be two resistors of equal value connected in series, one resistor going to ground and one resistor going to the 'bit' driver, and the center tap becomes the output. So this is almost like a two resistor voltage divider except we feed it with the bit driver not the Vcc power supply voltage.
When the bit is zero, we get 0v output, when the bit is +10v, we get +5v output. That's the entire range of our 1 bit DAC.
The question is, what happens when we load the lower resistor with another resistor.
If we start with 100k resistors and we load the lower resistor with 1k, suddenly we dont get +5v out anymore when the bit is high. We get a much reduced output.
If we start with 1k resistors and load the lower resistor with 100k (just the opposite) then we only loose a little voltage at the output when the bit goes high.
So the idea here is to keep the load a much higher impedance than the resistors are.
Dont forget though that here the bit drivers have to be two state voltage sources.
Since there are only 4 bits, another possibility is to use a weighted resistor ladder.
These resistors would each be set to deliver the required current for that bit.
For example, values 1k, 2k, 4k, and 8k, which would deliver current to a lower impedance load.
May have to go to 100, 200,400, 800 ohms, or somewhere in between to get the right currents, or maybe even 10k, 20k, 40k, 80k.
In this scheme the bit drivers can be one state voltage sources plus an open state (like an open collector output) which is much simpler than the two state drivers.
We could do a little circuit analysis to better understand all the options.
BTW, i guess you dont like op amps