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questions about logic chips

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mozikluv

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:D hello everybody :D

i have several questions to be answered by you guys who are well versed on logic chips;

1. is the pin assignment of the 74LS190N the same with the 74LS193N :?

2. Can the 74HC4066N be used to repalce the CD4066 w/o necessarily changing the accompanying components? :?:

3. What does n-stage counter mean. Does the "n" stand for any number of stages used like in a ripple clock, ripple carry/borrow or parallel gated carry/borrow configuration?

4. Why is it that some reading materials say that "unused pins should be tied to ground or to supply. So far I have not yet read an article that says "unused pins should be left open. Now how come I have been seeing several circuits with unused pins left open and others tied to ground. Are both approach correct in its own right? Does it mean that tying the unused pin to ground or leaving it open depends entirely on the application or function of the device? :? :? :?

Your replies would be highly appreciated :D :D
 
2.) Most of case yes, just keep in mind: the HC serie max. supply voltage is 6V. CD serie work up to 15V.
4.) The unused pins in logic circuit always need definited potential: low or high, except some special IC-s, e.g. encoders, decoders, it have three-state inputs for code setting.
 
n-stage

3.) The "n" refers to the number of flip-flops in the counter. Just remember there are different types of counters, so "n" + the counter type tells you what the maximum count is. Most "n-stage" counters are binary, and have a maximum count of n^2, so a 7-stage 4024 counts from 0-127, a 12-stage 4040 counts from 0-4095, etc. Same for gray code and other binary counter variations. Max count is the same whether the counter is ripple or synchronous.

A 4-stage decade counter is a binary counter that wraps around at a count of 9 instead of 15. Johnson type counters have a max count of 2n, so a 5-stage 4017 counts to 10. Linear feedback shift registers have n^2 - 1 states.

4.) Always tie unused input pins inactive (GND or VCC, depending on the case). With some logic families (like 74LS) you can get away without doing this, but it's bad practice to do so. With any CMOS logic family it's a must, otherwise your circuit may behave unpredictably and consume additional power.
 
Re: n-stage

laroche73 said:
3. The "n" refers to the number of flip-flops in the counter. Just remember there are different types of counters, so "n" + the counter type tells you what the maximum count is. Most "n-stage" counters are binary, and have a maximum count of n^2, so a 7-stage 4024 counts from 0-127, a 12-stage 4040 counts from 0-4095, etc. Same for gray code and other binary counter variations. Max count is the same whether the counter is ripple or synchronous.

A 4-stage decade counter is a binary counter that wraps around at a count of 9 instead of 15. Johnson type counters have a max count of 2n, so a 5-stage 4017 counts to 10. Linear feedback shift registers have n^2 - 1 states.

Claude meant to say that binary counters have a maximum count of 2^n, not n^2, and linear feedback shift registers have a maximum count of (2^n)-1. I guess he's dislexyc. :)
 
2^n

Oops :? , you're right. Thanks for the correction. Guess I should stick to johnson counters. 2n <=> n2 :wink:
 
thanx

:D :) :D :)

thanx to you RAVI, SEBI, RON H & LAROCHE. never have regretted that i became a member of this forum. again THANX!!!!!

:lol:
 
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