electroRF
Member
Hi,
I designed a Power Amplifier which I drew its schematic below.
View attachment 67036
The Input Power is constant, and I control the Power Gain of the PA by changing the values of IREF1 and IREF2 (controllable Current Sources).
When I decrease IREF1 & I REF2, the Power Gain decreases as well (which is what I wanted to achieve), but also the Efficiency of the Power Amplifier decreases.
When I decrease VDD (shown in Schematic) in parallel to decreasing IREF1 & IREF2, the Efficiency drops less drastically.
Please see Efficiency Graph below with Constant VDD Vs. Regulated VDD - as function of the Power Gain.
View attachment 67037
The first thing I'm trying to achieve is understanding why the Efficiency decreases as IREF1 & IREF2 decrease, with Constant VDD.
Can you please share some wisdom and guidelines regarding the Efficiency decrease?
Thank you very much.
I designed a Power Amplifier which I drew its schematic below.
View attachment 67036
The Input Power is constant, and I control the Power Gain of the PA by changing the values of IREF1 and IREF2 (controllable Current Sources).
When I decrease IREF1 & I REF2, the Power Gain decreases as well (which is what I wanted to achieve), but also the Efficiency of the Power Amplifier decreases.
When I decrease VDD (shown in Schematic) in parallel to decreasing IREF1 & IREF2, the Efficiency drops less drastically.
Please see Efficiency Graph below with Constant VDD Vs. Regulated VDD - as function of the Power Gain.
View attachment 67037
The first thing I'm trying to achieve is understanding why the Efficiency decreases as IREF1 & IREF2 decrease, with Constant VDD.
Can you please share some wisdom and guidelines regarding the Efficiency decrease?
Thank you very much.
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