PIC18f26k22 and CCPx PWM Challenged

[nickelflippr]

I've been fooling around with the 18f26k22 chip for short while, and have run into a mental block. In the example code posted below I try to set three standard PWM's using three different clocks and period register settings.

The CCP1 PWM works fine and responds to PR2 values and set/clr of the TMR2ON bit. The CCP2 PWM works, but is just a mirror of CCP1, and only responds to PR2 and TMR2. Getting zilch from CCP3. Have tried setting the CCPTMRS0 register bits (CCP2) and the CCPTMRS0 register (CCP3) to use TMR4 and TMR6 respectively. Also have different pre/post scale settings, to no effect.

Since this is a new chip for me, I learned about needing to set the PBADEN=OFF in config. Also have played with the CCP2MX and CCP3MX in config too. Hopefully will learn some other gotchas with this chip through someones experience or suggestions.

Here's the assembler file from GCBasic.

;Set up the assembler options (Chip type, clock source, other bits and pieces)
 LIST p=18F26K22, r=DEC
#include <P18F26K22.inc>
 CONFIG LVP = OFF, MCLRE = INTMCLR, PBADEN = OFF, CCP2MX = PORTB3, WDTEN = OFF, BOREN = OFF, FOSC = INTIO67

;********************************************************************************

;Vectors
	ORG	0
	goto	BASPROGRAMSTART
	ORG	8
	retfie

;********************************************************************************

;Start of program memory page 0
	ORG	12
BASPROGRAMSTART
;Call initialisation routines
	rcall	INITSYS

;Start of the main program
	bsf	TRISC,0,ACCESS
	bcf	TRISC,7,ACCESS
	bcf	TRISA,5,ACCESS
	bcf	TRISC,2,ACCESS
	bcf	TRISB,3,ACCESS
	bcf	TRISC,1,ACCESS
	bcf	TRISB,5,ACCESS
	bcf	TRISC,6,ACCESS
	movlw	112
	movwf	OSCCON,ACCESS
	bsf	OSCTUNE,PLLEN,ACCESS
	movlw	12
	movwf	CCP1CON,ACCESS
	movlw	10
	movwf	PR2,ACCESS
	movlw	1
	movwf	CCPR1L,ACCESS
	bsf	CCP1CON,DC1B1,ACCESS
	bcf	CCP1CON,DC1B0,ACCESS
	movlw	240
	movwf	T4CON,ACCESS
	movlw	12
	movwf	CCP2CON,ACCESS
	bcf	CCPTMRS0,C2TSEL1,ACCESS
	bsf	CCPTMRS0,C2TSEL0,ACCESS
	movlw	20
	movwf	PR4,ACCESS
	movlw	1
	movwf	CCPR2L,ACCESS
	bsf	CCP2CON,DC2B1,ACCESS
	bcf	CCP2CON,DC2B0,ACCESS
	movlw	3
	movwf	T6CON,ACCESS
	movlw	12
	movwf	CCP3CON,ACCESS
	movlw	128
	movwf	CCPTMRS0,ACCESS
	movlw	30
	movwf	PR6,ACCESS
	movlw	1
	movwf	CCPR3L,ACCESS
	bsf	CCP3CON,DC3B1,ACCESS
	bcf	CCP3CON,DC3B0,ACCESS
	bsf	T2CON,TMR2ON,ACCESS
	clrf	TRISA,ACCESS
	movlw	223
	movwf	LATA,ACCESS
START
	bra	START
BASPROGRAMEND
	sleep
	bra	BASPROGRAMEND

;********************************************************************************

INITSYS
	clrf	BSR,ACCESS
	clrf	TBLPTRU,ACCESS
	bcf	ADCON0,ADON,ACCESS
	bcf	ADCON2,ADFM,ACCESS
	clrf	ANSELA,ACCESS
	clrf	ANSELB,ACCESS
	bcf	CM2CON0,C2ON,ACCESS
	bcf	CM1CON0,C1ON,ACCESS
	clrf	PORTA,ACCESS
	clrf	PORTB,ACCESS
	clrf	PORTC,ACCESS
	clrf	PORTE,ACCESS
	return

;********************************************************************************


 END

 

[nickelflippr]

I think this might be a compiler problem. Nearly all the above registers mentioned are in a memory map area F38-F5F not handled by the 18f access ram command. Will have to give the asm a go in MPLAB when I get a chance.

 

[nickelflippr]

O.K. finally got things straightened out with the SFR's in non access RAM. This worked with banksel's. Might work with movff from the W register to the SFR, but I'm done fooling with it.

;Set up the assembler options (Chip type, clock source, other bits and pieces)
 LIST p=18F26K22, r=DEC
#include <P18F26K22.inc>
 CONFIG LVP = OFF, MCLRE = INTMCLR, PBADEN = OFF, CCP2MX = PORTB3, WDTEN = OFF, BOREN = OFF, FOSC = INTIO67

;********************************************************************************

;Set aside memory locations for variables
ABCED	EQU	256
ZEROX	EQU	257

;********************************************************************************

;Vectors
	ORG	0
	goto	BASPROGRAMSTART
	ORG	8
	retfie

;********************************************************************************

;Start of program memory page 0
	ORG	12
BASPROGRAMSTART
;Call initialisation routines
	rcall	INITSYS

;Start of the main program
	bcf	TRISA,5,ACCESS
	bcf	TRISC,1,ACCESS
	bcf	TRISC,2,ACCESS		;CCP1 default
	bcf	TRISB,3,ACCESS		;CCP2 with mux config PortB,3
	bcf	TRISB,5,ACCESS		;CCP3 default
	bcf	TRISC,6,ACCESS
	movlw	112				;16MHz
	movwf	OSCCON,ACCESS
	bsf	OSCTUNE,PLLEN,ACCESS	;enable 4xPLL for 16mips
;******** CCP1 *****************
	movlw	12		;std PWM mode
	movwf	CCP1CON,ACCESS
	movlw	0		;16 MHz (PRx + 1)*1/16000000*TMRx prescale
	movwf	PR2,ACCESS
	movlw	0		;D.C. 50% (CCPRxL:CCPxCON<5:4>)/4(PRx+1)
	movwf	CCPR1L,ACCESS
	bsf		CCP1CON,DC1B1,ACCESS
	bcf		CCP1CON,DC1B0,ACCESS
	bsf		T2CON,TMR2ON,ACCESS		;no prescale
;******** CCP2 *****************
	movlw	12		;std PWM mode
	movwf	CCP2CON,ACCESS
	movlw	8		;set CCP2 PWM timer as TMR4
	banksel CCPTMRS0
	iorwf	CCPTMRS0
	movlw	50		;50 instr cycles * 16 prescale * 1/16000000 = 50 us or freq. of 20kHz
	banksel PR4
	movwf	PR4
	movlw	20		;40% D.C. with PR4=50: 20 (instr cycles) * 16 (prescale) * 1/16000000 = 20 us
	movwf	CCPR2L,ACCESS
	movlw	7		;Prescale is 16, TMR4ON=1
	banksel T4CON
	movwf	T4CON
;******** CCP3 *****************
	movlw	12		;std PWM mode
	banksel CCP3CON
	movwf	CCP3CON
	movlw	128		;set CCP3 PWM timer as TMR6
	banksel CCPTMRS0
	iorwf	CCPTMRS0
	movlw	100		;100 instr cycles * 16 prescale * 1/16000000 = 100 us or freq. of 10kHz
	banksel PR6
	movwf	PR6
	movlw	50		;50% D.C. with PR4=100: 50 (instr cycles) * 16 (prescale) * 1/16000000 = 50 us
	banksel	CCPR3L
	movwf	CCPR3L
	movlw	7		;Prescale is 16, TMR6ON=1
	banksel T6CON
	movwf	T6CON
;*******************************
	clrf	TRISA,ACCESS	;just keeping some leds off
	movlw	223
	movwf	LATA,ACCESS
START
	movlw	255		;nonsense stuff
	banksel	ABCED
	movwf	ABCED,BANKED
	movlw	123
	movwf	ZEROX,BANKED
	bra	START
BASPROGRAMEND
	sleep
	bra	BASPROGRAMEND

;********************************************************************************

INITSYS
	clrf	BSR,ACCESS
	clrf	TBLPTRU,ACCESS
	bcf	ADCON0,ADON,ACCESS
	bcf	ADCON2,ADFM,ACCESS
	movlw	0
	banksel	ANSELA
	movwf	ANSELA
	movwf	ANSELB
	bcf	CM2CON0,C2ON,ACCESS
	bcf	CM1CON0,C1ON,ACCESS
	clrf	PORTA,ACCESS
	clrf	PORTB,ACCESS
	clrf	PORTC,ACCESS
	clrf	PORTE,ACCESS
	return

;********************************************************************************


 END