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(PIC) EEPROM writes not working

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blueroomelectronics

Well-Known Member
This works in the MPLAB simulator but not on the 18F1320. Any idea what I'm doing wrong?
Code:
#define MyJune  "Junebug Hi",0    ; Junebug name <= 16 bytes
    list     p=18F1320
    include <p18F1320.inc>
     CONFIG    OSC=INTIO2,WDT=OFF,LVP=OFF
        org    0x0000          ; Junebug bootloader vector
Start   bcf     INTCON,GIE      ; interrupts OFF
        movlw   low(Name)
        movwf   TBLPTRL              
        movlw   high(Name)
        movwf   TBLPTRH         ; point to Name table
        clrf    EEADR
Loop    tblrd*+                 ; read table and increment
        tstfsz  TABLAT          ; is it 0x00
        bra     WriteEE         ; no then repeat
        bra     Exit

WriteEE bcf     PIR2,EEIF       ; clear EE flag
        movff   TABLAT,EEDATA   ; EEDATA = TABLAT
        bcf     EECON1,EEPGD
        bsf     EECON1,WREN     ; enable EEPROM writes
        movlw   0x55
        movwf   EECON2
        movlw   0xAA
        movwf   EECON2
        bsf     EECON1,WR
        btfss   PIR2,EEIF
        bra     $-2
        incf    EEADR
        bra     Loop
Exit    bcf     EECON1,WREN
        bra     $               ; stop
Name    data    MyJune
        END
 
Bill,

You haven't cleared the CFGS bit and so you are writing to the configuration registers. If you change your bcf EECON1,EEPGD to clrf EECON1 then it should all work fine.

Mike.
 
Pommie said:
Bill,

You haven't cleared the CFGS bit and so you are writing to the configuration registers. If you change your bcf EECON1,EEPGD to clrf EECON1 then it should all work fine.

Mike.
What he said ^^^^^^

I fell into this trap a few years ago - worked in the simulator but not on the real unit.

Its good practice to make sure all register bits are set or cleared as per the datasheet - never assume a bit is going to be set or cleared on restart.
 
Ahh thanks, simple mistake; silly of me to not clear the registers.
I was using the datasheet sample code but forgot to check the EECON1 defaults.
 
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