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New PIC16 chips GPR memory org.

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Mosaic

Well-Known Member
Hi all:
I read somewhere that the newer enhanced 16F PIC chips have a 'flat' memory organization (GPR) with no banking issues. Is this accurate?
Eg. 16F18857 or 16F1936
 
Not exactly - you can however access the memory in a fairly linear fashion by correctly setting the options.

I used a 16F1827 for exactly that reason, configured a linear buffer in the memory, downloaded GSM txt messages to it, and then searched the buffer to identify required strings.
 
John, can u advise on the FSR access to the 'linear' GPR being only 9FF bytes long?
The 16F18857 has 1000h bytes of GPR. How would these extra bytes be mirrored?
 
Fortunately or unfortunately, depending on your point of view, I have never had to do that. I do find the much easier FSRx and tables a real boon. Also, the added instructions and direct access to WREG have been appreciated. The 12F1840 has replaced the 12F683 as my simple chip. I like the 16F1829 too. I have not gotten into the newest versions like the 16F18857. I am still wed to MPLab 8.92, so some new stuff is not available to me. I plan to change that in the future.

John
 
A quick glance at my old source code shows declaring the linear buffer using cblock.

Code:
cblock   0x2050                ;receive buffer starting in bank1
               Buff:Buff_Size   ;240 character receive buffer
endc
 
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