Hi All:
I've been simulating the SMPS improvement (mc33063a LTspice model) as documented here:
https://www.onsemi.com/pub_link/Collateral/AND8284-D.PDF
for the NCP3063 (about $0.45 ea) 40Vmax, buck/boost regulator.
Here are the data comparisons for a buck I am making:
Cout = 100µF , 0.2Ω ESR. L = 1mH, 1.7 Ω DCR. Vin = 36V, Vreg = 12.65V. 100Khz clock.
Case 1: Light Load
400 Ohm load @ 12.65Vout (32mA): Stock design (no feed forward) =>
103 mVpp ripple at an audible 4Khz .
133K Feed forward resistor =>
31mVpp ripple @ 24Khz (not human audible).
Case2: My max Load
40 Ohm @ 12.65V (320mA): Stock design (no feed forward) =>
62 mVpp ripple at 25Khz.
133K Feedforward =>
47 mVpp @ 48Khz.
The addition of a single resistor appears to resolve the long 'off' periods and resultant ripple and audible whining. I chose a 133k as the closest BOM item to 120K which seemed to give the best results. Too low a value loads down the V.out regulation.
This can be optimized further with the use of a zener & 10K series arrangement for the feed forward where the zener is about 0.6V under the target Vout. 12V in this case.