Mytery Electronic Problem

[regal009]

https://www.youtube.com/watch?v=xgaULG0mba8&feature=youtu.be

i have this particular situation..
in my circuit, i needed two power supply, 1 for the control circuit and 1 for the motors and relays,

isolated via optocoupler..

my problem is, when i turn on or off my supply for motor, the control circuit is malfunctioning.
even though there is nothing connected in that supply.

watch the video to know the situation better..

thank you in advance..

we're getting desperate, deadline is in 12hours..

 

[ronv]

There is no video or schematic.

 

[regal009]

https://www.youtube.com/watch?v=xgaULG0mba8&feature=youtu.be

this is the video

 

[picbits]

Where is the schematic ? Do you have adequate decoupling capacitors for whatever you're using for the control circuit ?

Do you have snubber diodes/capacitors across any inductive loads ?

Without the above information you are correct - its a mystery electronic problem for the rest of us too.

 

[regal009]

i'm having problem with my 4 rs flipflops. the one that lights the LED in the video..

i've detached all my inductive load and the problem is still there..

i tried putting distance between my power supply and my circuit. the problem lessen but it is still there. about 1 meter. (alligator clip length)

 

[picbits]

Again, where is your schematic and do you have adequate decoupling capacitors on your flipflops ?

What is triggering the flipflops ? Do you have any long input wires ? Do you have any snubbing/filter circuitry on the fliplop inputs ?

What are you using for regulating the power supply ? Is it onboard near the flipflops or are you relying on a power source away from the circuit board ?

 

[regal009]

View attachment 67431

the schematic is 4 rs flipflops that gets its input from OP-AMP comparator that use LDR to sense light..

the output of 1 rs flipflop is the input of rs flipflop adjacent to it.

i've interchange the r and s in the schematic on my hurry >.< sorry but nvm

yes i do have long input wires..

i don't quite understand how to use decoupling on rs flipflop and snubbing/filter..

im relying on a power source away from the circuit..

sorry for my bad english..

one thing, it might help, the rs flipflop is sensitive, it goes high when i touch an open wire which is connected in the input of a rs flipflop

 

[picbits]

Put a 1uf and 100nf capacitor across the power pins of the rs flipflop as close to the pins as possible. This is called decoupling.

Your diagram shows some inputs to the rs flipflops - where do they go ? What is the resistor to ground value ? what triggers them ?

If you have long input wires then these may be causing the problem - they will pick up any spikes or rf interference.

 

[regal009]

1uf and 100nf in pin 14 per 7402?

inputs of all flipflops are from OP amp comparator that uses LDR to sense light,. like the figure in the top..
in my circuit board, there is 4 OP amp connected to every SET of each rs flipflop..

the output of rs flipflop is the reset of its adjacent rs flipflop so that it will reset when one flipflop will SEt..

pull down resistor are all 1kohms..

i will shorten those wires as short as possible..

 

[panic mode]

decoupling capacitors are used across power terminals of a IC. for example in case of 7402, power terminals are 7 and 14. capacitors should connect to those terminals.

 

[regal009]

thanks.. is 2.2uf and 10pf ok?

thats all we got, its midnight here..

 

[Roff]

If your flipflops are made from 7402s, 1k pulldown is too high. They could triggered by a butterfly passing by.
If they are made from 74LS02s, 1k is marginally OK.
If you reduce the values of the resistors, the triggering gate output may not be able to supply enough current to trigger the following FFs.
Using pulldowns with TTL is poor design practice, because the logic low input current is substantial, and the logic high output current is low. I think I would have inverted the logic and used NAND gates. Logic high input current on TTL is low, and logic low output current is high. You can use high value pullups with NAND flipflops.
I realize you don't have time to change them.

 

[picbits]

thanks.. is 2.2uf and 10pf ok?

thats all we got, its midnight here..

10pf won't do much really, the 2u2 may help a bit. Give it a go and see if it helps.

Do you not have any old computers / televisions / hifi / computer mouse etc you can scrounge some 0.1uf (100nF) capacitors from ? They are very common parts.

 

[regal009]

we used 74LS02p..

im bad in understanding english..
how is it become a poor practice of using pulldown?

 

[Roff]

we used 74LS02p..

im bad in understanding english..
how is it become a poor practice of using pulldown?

I explained it in post #12, but I'll say it again in different terms:
TTL logic low input current, through a resistor to ground, raises the logic zero voltage above ground. In 7400 series TTL, a 1k can raise the logic low voltage by a volt or more. This is above the minimum VOL of 0.8V. I know you are not using 7402s.

In 74LS logic, 1k can raise the input voltage by as much as 0.4V. This is OK, because it is well below the minimum VIL of 0.8V. However, to raise the input to the minimum VIH of 2V, you must supply (2V/1k)=2mA per load. In your circuit, some of your outputs have to drive two 1k loads, with a diode in series, which further reduces the available current. A 74LS gate output, worst case, may not be able to do this, as VOH is 2.7V minimum at 0.4mA load. There is no spec for the available current at Vout=2V.
The bottom line is, TTL inputs require a (relatively) high current for logic low inputs, and outputs are designed to provide that current. Logic high inputs require 20uA max, so the outputs are not designed to provide much sourcing current when high. This makes driving resistive loads to ground more difficult than driving loads to Vcc.

PS I just noticed that your capacitors have no discharge path. You need a resistor to ground from each diode cathode.

 

[regal009]

If your flipflops are made from 7402s, 1k pulldown is too high. They could triggered by a butterfly passing by.
If they are made from 74LS02s, 1k is marginally OK.
If you reduce the values of the resistors, the triggering gate output may not be able to supply enough current to trigger the following FFs.
Using pulldowns with TTL is poor design practice, because the logic low input current is substantial, and the logic high output current is low. I think I would have inverted the logic and used NAND gates. Logic high input current on TTL is low, and logic low output current is high. You can use high value pullups with NAND flipflops.
I realize you don't have time to change them.

it will take time to sink it in my brain.. thanks a lot though., 6 hours before deadline,.. and i am only at 50% progress...

 

[Roff]

it will take time to sink it in my brain.. thanks a lot though., 6 hours before deadline,.. and i am only at 50% progress...

Be sure to read post #15, particularly the last sentence (the PS).