Will the transistors in the circuit make the input low, when a PIC signal is applied on the base of the transistor?
The upper MOSFET:
This need a low signal (0V) to fully open, so when the FET gets a low signal the voltage applied to the gate is +12V, right? When the signal goes high the 12V will flow through the collector-emitter to GND, so the MOSFET will get the low signal on gate to open.
Couldn't the lower FET to drive the NMOS be turned around, so it's normally providing the MOSFET gate with a low signal when no PIC signal is applied? The pull-up resistor must then be turned into a pull-down resistor. Then both transistors need a PIC signal to turn on, which is easier to operate with.
I didn't knew that problem could occur when only testing half of the bridge. That shouldn't have something to say...