Hi,
If i followed your notes then perhaps you can use a time period
solution that is known to work with all time but cant be employed
for all time because it isnt appropriate for some time periods.
That is, take (for example) two 10k resistors and use them as
pull downs, but dont connect them directly to ground but instead
to the collector of an NPN transistor (emitter to ground). When the
transistor is on, the gates are pulled down close to ground, and when
the transistor is off, only the collector leakage current flows.
The only task left then is to figure out a way to generate a timing
pulse to the base of the NPN. Perhaps with charging cap (+Vcc to
base plus series resistor) so that at the instant of turn on all the
gates get pulled down, but that only lasts until the cap charges.
Ditto with a MOSFET for the controlling device instead of NPN.
The MOSFET would even be faster, and gate timing could be
made such that the pull down circuit pulls down faster than any
gate can turn on.
Another approach might be to use a dedicated uC pin, delaying its
effect with a capacitor so that it has to hover at some stable
logic level in order to charge the cap, and charging the cap
turns off the pull downs with appropriate transistor circuit.