Monostable Problem

[malsch]

Hi,
I am trying to produce a 1 second pulse with the monostable but for some reason, the output is the inverting of the trigger. The following screenshot explains it all:

**broken link removed**

Any help why this is happening to me would be appreciated

Thank you.

 

[ericgibbs]

Hi,
I am trying to produce a 1 second pulse with the monostable but for some reason, the output is the inverting of the trigger. The following screenshot explains it all:

Any help why this is happening to me would be appreciated

Thank you.

hi,
The trg to a 555 has to be pulled low from high, it triggers on the falling edge.
Dont hold the trigger low.
Use capacitive coupling to the trigger.

EDIT:
The other problem is you have the 555 configured as a retriggerable mono, so it will follow the 10Hz input.
The mono timing is set for 1sec.

 

[malsch]

u mean that once the falling edge is detected, the trigger has to go high again? i dont really know what capacitive coupling is...

 

[MrAl]

Hi there,


Eric:
Doesnt he need a clamping diode on the input of the trigger, or do the 555's have the clamping diode built in?
With the input high, the capacitor is discharged...no problem. When the input goes low, even for a short time, the cap charges up a little so now it has some voltage across it with right side positive and left side negative. When the input again goes high, the cap volts appears in series with the input voltage which means it adds to it. If the cap charged up to 2.5v and the input went to +5v that puts 7.5v at the trigger input of the 555. The drive power is mostly dependent on the output impedance of the preceding drive stage, but a single clamp diode might be enough. I never checked the 555 regular version or CMOS version for clamping diodes so there is a chance they have them already but it might be good to check.

LATER:
I checked the regular version and it doesnt appear to have a clamping diode. I dont have the CMOS version data sheet yet, that may have them.
LATER YET:
Ok, found a CMOS data sheet. They dont mention the clamping diodes either but i bet they have them. However, they spec the max input voltage as Vcc+0.3v, so that means with a 5v power supply we could go only as high as 5.3v before we overshoot the spec. We'd either have to use a Schottky or assume the clamp diode is there i guess. Perhaps a little series resistance to limit current through the clamp diode would be a good idea too.

 

[malsch]

using proteus, this method worked 10q very much. i will soon test it on my breadboard and keep you posted

 

[malsch]

it worked when i built it on the bread board. But the only problem is that i need it to work for 1hz, 10Hz and 100Hz. It works for 1hz and 10hz but for 100Hz it doesnt. do i need to increase the value for the resistors and decrease the value for the capacitor? 10x

EDIT: sry its actually working with the 100Hz also. i used an LED to test it and didn't see it blinking due to the stroboscopic effect

 

[ericgibbs]

hi Al.
For 99% of the circuits in use, the 555 trigger does not have a clamp diode, I have never seen or heard of a reported failure when using lower capacitor values, say 1nF thru 10nF

In some 555 configurations the coupling capacitor has to be a fairly high value, in those circuits I would fit a 1N914, if say, 100nF or higher,

 

[MrAl]

Hi Eric,

Oh? That's interesting because the lower cap values allow the voltage to shoot up higher than the higher cap values. That's because the overshoot depends on the time constant of RC and the smaller the cap value, the faster the cap charges up so next time the input goes high it's got more voltage across it. Interesting huh?

I did a quick analysis in the circuit simulator with 100us low pulses and 1ms period and Vcc=5v. Using resistor values of 10k and cap values of 0.001uf, 0.01uf, and 0.1uf. The 0.1uf cap only allowed overshoot up to 5.5v approximately, while the 0.01uf allowed up to about 8v, and the 0.001uf up to about 9.7v approximately. Increasing the value of the second resistor to 100k helps too, but i believe your choice of 10k was better.

The amount the cap charges to is:
Vc=Vcc*(1-e^(-t/RC))
and the overshoot when the signal goes high is:
Vpeak=Vcc+Vc

The reason for concern is that Vpeak becomes greater than Vcc for some time period and the internal base emitter diode of the input transistor gets reversed biased. The max reverse voltage for these transistors is usually around 5v so anything over that would eventually kill it.
For pulse width of 100us and C=0.1uf we get Vc=0.476v, for C=0.01uf we get Vc=3.16v, and for C=0.001uf we get Vc=4.999v. That puts Vpeak at 5.5v, 8.2v, and near 10v for those three caps respectively. I would bet that 5.5v wont hurt it, but i'd be worried about the 8.2 and 10v repeatedly hitting that internal transistor.

Since the low pulse period has a lot to do with it too, we could look at his actual pulse timing and do a quick evaluation of how bad this will be for his actual circuit. We'd only have to calculate the charge voltage and add that to Vcc to get the overshoot, given his low pulse period time.

 

[ericgibbs]

hi Al,
IMO its not only the Vpk at the Trigger due to the coupling cap, one has to consider the 'total energy' of the overshoot, this I believe is responsible for damaging the 555 trig input when high value capacitors are used.

I have run 3 sims with 10n,100n and 1uF caps, ref the images. [ the RED plot is the Cc current versus time]

 

[MrAl]

Hi Eric,

Yes i believe that too, but then again all the spec's i've ever seen dont specify a time or an energy level, just a voltage level such as 5v, 10v, etc. In other words, they will spec an input pin as allowing some maximum voltage level like Vcc+0.5v or something like that...ie they dont say "Vcc+0.5v for 1ms, Vcc+1.0v for 100us, Vcc+5v for 10us", they just say "Vcc+0.5v" and that's it. This is the way it is in the transistor world too, where the breakdown is considered to take no time at all once the threshold has been exceeded. This is probably why they never specify the time period or the energy unless it has some other significance.
Also, it would be hard for us to access the damage with varying voltage overshoots and time periods. For example, we might know 10v for 1000 seconds is damaging, but how do we access 10v for 1us for example...does it do damage or not? The only way i myself can be sure is to never allow the voltage to exceed the spec sheet max spec cause that's all the concrete knowledge i have about that kind of specification.
This is pretty much standard practice though, with inductors too as im sure you know. With capacitors in some pulse circuits there's also the chance of the voltage going too negative, in which case a diode clamp to ground is used. It's more common with inductors, but caps can also be a problem.
Make sense?

Another problem that can come up is with some input driving the cap and a clamp diode to Vcc. The pulse energy is high enough and the total impedance on Vcc is high enough such that the pulse can drive Vcc higher (surprise surprise ha ha). This puts a high pulse on the Vcc line and of course blows out components that cant stand an increase in Vcc

 

[ericgibbs]

hi Al,
I would agree that without any documentation from the manufacturer, its difficult to be sure what the failure mechanism is, when the 555 trigger 'fails'.

I can only speak from experience in using all the 'varieties' of the 555, I have never had or heard of a trigger failure. I tend to use a 10nF almost as standard, some use 1 1nf, but I have seen problems with a capacitor that low, it sometimes just does not trigger the 555.

On the web, there are circuits without the clamp diode which use microFarad values, for a high value uF I would always fit a 2p diode.

 

[MrAl]

Hi Eric,

That sounds good at least

It's too bad i cant find a decent internal schematic of the CMOS 555. I found one for the regular version but not the CMOS version.

 

[ericgibbs]

hi,
This is CMOS d/s with an 'idealised' circuit.

 

[MrAl]

Hello Eric,

That's a better data sheet than i was able to find. It shows the inputs going to the input of a CMOS transistor, but it also says that it is protected for ESD, so there must be diodes on the input probably one to Vcc and the other to ground. Too bad they dont give the spec's on these diodes like they do with the PIC chips. It's hard to figure out if we can use these diodes to clamp overshoot or not from the data sheet.
The non CMOS version is much different though, that probably doesnt have any diodes.

If i had a CMOS version handy i would do some tests and make some measurements, but i only have a regular version around somewhere. I dont use these too much anymore.

I wonder if we can get hold of a CMOS version spice model. Maybe we'll get lucky and they will show the diodes there

 

[malsch]

hey, now that the circuit i was working on is working properly, i was wondering what the resistors and capacitor actually do in the screenshot ericgibbs provided:

 

[ericgibbs]

hi
R1 and C3 set the Timing period of the monostable [ period the output pin#3 is High ] . The 555 datasheet has the formula's for calculating the period.

C1, is decoupling of the Control voltage pin, in some projects this is not used.

 

[MrAl]

hey, now that the circuit i was working on is working properly, i was wondering what the resistors and capacitor actually do in the screenshot ericgibbs provided:

Hi,

The second 10k cap pulls up the trigger input (pin 2) of the 555, keeping it positive when there is no trigger signal.
The first 10k pulls up the trigger source and may not be needed if the source already has an active high output.

We were talking about overshoot on pin 2 earlier, and this next diagram helps to illustrate this possible problem. As shown in the diagram, a diode (like 1N4148 although a Schottky is better) is used to clamp pin 2 to +5v (this example uses a +5v power supply). When the input trigger goes high the voltage across the cap adds to the input signal for a time equal to about 5 time constants. This means pin 2 might go to twice Vcc for a time (after all the new cap and the second 10k resistor make up a voltage doubler circuit). The diode is there to clamp this to a safer 5.5 volts or so instead of 10 volts. It is possible that the CMOS versions of the 555 already have this diode though, but it is unknown if the regular NE555 type has this diode or not.
The other requirement for this diode or one already in the 555 is that the power supply impedance has to be low enough to be able to sink any current from that diode. This could require an extra resistor across the 555 power supply terminals in some cases. Alternately, a zener could be used to clamp pin 2 to ground instead.

 

[malsch]

i mean the ones that he added. the 2 10k resistors and the 10nF capacitor

edit: ok 10x MrAl

 

[MrAl]

Yes, i replied with those questions in mind, see that post just before yours. I also talked about a possible diode clamp.