C crashlcd New Member Sep 1, 2009 #1 **broken link removed**HI guys,, i'm new to this forum.. I want to build a modulo 10 up counter using j-k's. can anyone tell me whether this schematic is correct or not??**broken link removed** Last edited: Sep 1, 2009
**broken link removed**HI guys,, i'm new to this forum.. I want to build a modulo 10 up counter using j-k's. can anyone tell me whether this schematic is correct or not??**broken link removed**
ericgibbs Well-Known Member Most Helpful Member Sep 2, 2009 #2 crashlcd said: HI guys,, i'm new to this forum.. I want to build a modulo 10 up counter using j-k's. can anyone tell me whether this schematic is correct or not??**broken link removed** Click to expand... hi, Look at this edited image, you will see the NAND gate I1 generates a high pulse as the 2nd 4027 Q goes high [thru the invertor]. For a NAND if either input is low the output is high.! Recheck the Clr logic. Also dont forget to connect the 4027 PRESET pins to 0V. Attachments AAesp01.gif 64 KB · Views: 1,044 Last edited: Sep 2, 2009
crashlcd said: HI guys,, i'm new to this forum.. I want to build a modulo 10 up counter using j-k's. can anyone tell me whether this schematic is correct or not??**broken link removed** Click to expand... hi, Look at this edited image, you will see the NAND gate I1 generates a high pulse as the 2nd 4027 Q goes high [thru the invertor]. For a NAND if either input is low the output is high.! Recheck the Clr logic. Also dont forget to connect the 4027 PRESET pins to 0V.
ericgibbs Well-Known Member Most Helpful Member Sep 2, 2009 #3 hi, Have a look at this sim image. Attachments AAesp02.gif 27.9 KB · Views: 945