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microcontroller/pic having advanced interrupt handling

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jahan

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i need info about a microcontroller or pic which can handle about 15-20 hardware interrupts (want to avoid software polling)
if the chip has an interrupt controller (like 8259 for 8085/86) then that might help too
 
Use 8259s along with 8051 microcontroller. That will be the best solution.

or simply "OR" all your interrupts and connect it to INT0/INT1 pin of 8051. This will confuse between simultaneous interrupts. To solve this problem use Priority Encoders like 4532.
 
8051 and 8259 aint compatible....i think

8259 needs an INTA(bar) signal which microprocessors like 8085/86 provide but 8051 doesnt.(is there any other microcontroller which provides INTA(bar))
ORing the interrupts is not an option since we need priority handling too.
bout the suggestion of using priority encoders....are they fast like having delay time in nanoseconds coz our requirement is that the interrupt gets recognised in nanoseconds.
if anyone knows bout such fast responding encoders or other microcontrollers or interrupt handlers satisfying the requirements pls help
thank u for the inputs so far...
 
just providing info bout the abbreviations

INT 0 - external hardware interrupt 0
INT 1 - external hardware interrupt 1
INTA(bar) - interrupt acknowledge and bar signifies active low signal
 
You can manually generate INTA\ signal on 8051 using any of its I/O Pin. The pin should be asserted when 8051 begins execution of ISR and made high when it exits the ISR.
 
what bout time delay

the idea of fashioning an INTA\ signal is cool
i think we would need 8259 to supply the type no of the interrupt to the microcontroller which will execute the appropriate ISR after recognising the type no and priority will also be taken care of
but what bout the time delay will it be significant or negligible
if the working of the interrupt system has been misunderstood then please explain
thank u for the gr8 idea
looking forward to some more help
 
I don't think you'll face any timing problems with 8259. Since it is a static device working without any clock or polling, as soon as it receives any interrupt, it will send IRQ to the uC with a time delay equivalent to its propogation delay (few nano Sec.).
The real time delay will occur after this. uC will finish its current instruction and then go to the ISR which will take a few integral number of clocks. But in the mean time if other interrupt occurs, 8259 will also handle it. So for better speed of response use higher crystal speed.
 
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