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Memory alignment

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KISS,

The Intel processors can operate from any address, but the storage and retrieval of data is more efficient if the data is aligned. Since the Intel instructions are of variable length, successive instructions cannot be guaranteed to be on an even address, nor do they have to be.

Data groups are referenced by "structures" in assembler. Once they are set up, any piece of date is easily referenced.

Ratch

Motorola's 32 bit cpu does the same thing. The length of an instruction is determined by the opcode. Some opcodes require 1 byte, some 2 bytes, some 8 bytes. Therefore, the program instructions are going to be misaligned. The internal structure of the cpu knows this and does byte swapping to put them in the correct sequence inside the processor. Same for a memory read, however, like Ratchit said, it is more efficient if the data words are aligned, as it may have to do an extra read to get to the final byte of data if the first byte is misaligned.
 
that's because PICs suck... hahahahahahahhaa!!

Others like the x86 don't normally trap on misaligned data but that (a trap) usually means the program is running crap instead of the correct program and data on a PIC so it's a good thing. The default Trap vectors either loop or reset but you can write your own trap routines to fixup the program error and continue at a safe point.
 
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