low speed usb in 18f4550,configuration word

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aswin p ajayan

Member
hi,
i am trying to interface pic 18f4550 through USB . i have done it in high speed mode . now i want to do it on low speed usb to mimic a keyboard . can any one give the configuration word for low speed USB for 20 Mhz clock.

ericgibbs

Well-Known Member
hi,
This works for the 18F2550, which is the smaller version of the 18F4550

Code:
   LIST p = 18F2550, r = dec, w = -311, f = inhx32
errorlevel -302, -207

CONFIG PLLDIV=5,CPUDIV=OSC1_PLL2,USBDIV=2,FOSC=HSPLL_HS,IESO=OFF
CONFIG LPT1OSC=OFF,BOR=ON,BORV=2,STVREN=ON,LVP=OFF,ICPRT= OFF,XINST=OFF,DEBUG=OFF
CONFIG WRTB=ON
EEPROM_START EQU 0F00000h
BLOCK_SIZE EQU 32

PLLDIV=5 ' This sets the PLL Postscaler to divide the primary osc input by 5
providing 4MHz to the 96MHz PLL. The 96MHz PLL input must always be 4MHz
as shown in the data sheet.

CPUDIV=OSC1_PLL2 ' This sets the PLL Postscaler to divide the 96MHz PLL
output by 2 providing a 48MHz clock to the CPU.

USBDIV=2 ' This divides the 96MHz PLL output by 2 providing 48MHz to the
USB core.

FOSC=HSPLL_HS ' This enables HSPLL for high-speed crystal/resonator.

aswin p ajayan

Member
thank you Eric
but i guess this is the config word for high speed usb .please correct me if I am wrong . low speed usb needs a 6Mhz clock .
and it would be really helpful if you could send the configuration word in hitech c

ericgibbs

Well-Known Member
hi aswin,
I use this CONFIG for HID USB and it works OK.

The PLL in the 18F4550 needs to have a 4MHz input, thats why when a 20MHz xtal is used the PIC divides the 20Mhz by 5 to get 4MHz.

E

Ian Rogers

User Extraordinaire
Forum Supporter
From the datasheet it looks like you only need to set bit 2 in the UCFG register.... This must change the PLL to suit.

Also you need to put a pullup to 3.3v from the D- terminal so windows can detect a low speed device..

I have searched for the correct settings but I haven't time to do any more....

aswin p ajayan

Member
Thanks Ian ,
i have gone through it . i did set the FESN bit(UCFG_bit2) to zero , and UPUEN = 1; (to enable pull up on d-) and ienbled internal regulator. Iam using microchip's usb firm ware framework . also
#define USB_SPEED_OPTION USB_LOW_SPEED
has been used still no luck

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