Logic Gates Confusion

[Musicmanager]

Morning Guys

Firstly, please bear in mind I'm a complete novice taken up a new hobby and trying to get my head round some very confusing stuff. I divide my hobby time between building a project I've already thought through and planned with the help of you guys and thinking through, planning and understanding the next project.

My next 'thinking project' is to do with countdown timers. I built a countdown timer based on a PIC 16F628a which counts down from 5 discreet bases 8, 16, 24, 32 & 40 mins using code provided for me by a Picprojects kit which works very well. I now want to understand how to build a countdown kit with 7 segment LED displays which can be preset to the same bases and will display the countdown. I've got a schematic drawn by one of the members on here which uses a 74LS192 IC up/down controller and I decided the best thing to do first was to understand how that chip does what it does ! I downloaded the datasheet which has a narrative of it's operation and also a graphic circuit diagram of the logic gates contained. I've read the chapters on logic gates in my books 47 times and decided I was now ready to try and understand the chip.
Failure !!!! - the diagram shows some of the logic gates with 6 or 7 inputs !! My books show only two in most cases - so some must go to one input and some to the other ? But there is no indication how this is done so how do I work out what will happen when a high or low + or - arrives at an input ?

Since this is more about me learning than the optimum operation of a digital countdown timer, I'm not interested in changing the schematic to another project, I just simply want to understand how this one works by developing my own analysis skills.

A suggestion of where I'm going wrong would be much appreciated

Thanks
S

 

[Reloadron]

With only a focus on the 74192 PRESETTABLE BCD/DECADE UP/DOWN COUNTER. The link is to a relatively good data sheet. Here is what the logic looks like:

I circled the inputs in Blue and outputs in Red.

Now using the above image as a reference for the 74192 what questions do you have?

Ron

 

[Musicmanager]

Hi Ron

Thanks for the interest .. ..

My confusion - for example - at the very top of the graphic there two NAND gates, one with 5 inputs and one with 3. This situation occurs on many occasions although the gates are sometimes different. I want to understand what a signal will do but there is no indication of which input is which - may not matter with a NAND because the signal on either would pass high but on both would pass low ?

S

 

[alec_t]

For a NAND gate, e.g the top gate in the above pic, all the inputs (however many there are) must be high for the output to go low.

 

[JimB]

Some terminology for you to help you on your journey of understanding.

The outputs
In the schematic provided by Ron, the outputs are marked up as Output Qa, Qb, Qc Qd.
Outputs are generally refered to as "Q" often without the word "Output"

The inputs
Fairly obvious, often abreviated to just Ia, Ib etc.
The subscripts
The inputs and outputs have the subscripts a, b, c, d.
These indicate the value or weighting of that input/output.
A = 2^0 = 1
B = 2^1 = 2
C = 2^2 = 4
D = 2^3 = 8

UP
Pulsing this input increments the count output.

DOWN
Pulsing this input decrements the count output.

CLR
Pulsing this input clears the output count to zero.

LOAD (with a bar on top)
Pulsing this input low (to logic 0) will load the counter with the binary value set on the DATA INPUT lines A to D

BO (with a bar on top)
BORROW Output. When counting down, when the counter underflows from 0 to 9, this output goes low to binary 0.

CO (with a bar on top)
CARRY Output. When counting up, when the counter overflows from 9 to 0, this output goes low to binary 0.

An input or output with a bar on top, indicates that this I/O is active when it is in the Low state.

I hope that this helps.

JimB

 

[Musicmanager]

Hi Guys

Thanks for the help .. ..

The graphic Ron has given is exactly the one I've been using from the Texas Datasheet.

JimB thanks for the definitions - that's very helpful in understanding the IC as a whole which I need to do. However, what I was trying to do is to establish the 'why' element, ie. a logic high on input 'UP' will increment the count output - if you follow the circuit through the gates you will see that ?? Not in my eyes !

Input B has two AND gates with two NAND gates either side of them - each has 3 connections but no indication of which is where, so how do I access and understand the behaviour of these gates with differing signals and then interpret the effect on the OR gate that follows - and one of those has 3 un-labelled connections.

On a slightly different note - I've decided that the rectangle boxes on the right of the IC scheme are SR Flip Flops and 'T' is a trigger ?? Tell me I've got that wrong too !

Thanks again

S

 

[ronsimpson]

Musicmanager, You picked the hardest counter to understand.
**broken link removed**
This is a ripple counter. Very simple. It is called a ripple counter because the first FF gets a signal and (1/2) the time then (with a tiny delay) sends the clock on to the next stage. The clock "ripples" down the line.
---------------------------------------------
This counter does not ripple. All FFs have the same CLK so they all work at the same time. (will count faster)
Here they are using JK-FF. If you tie J and K together you have a T-FF. {there is a single T input} When T=0 the output holds. When T=1 and there is a rising edge on CLK the outputs toggle. (reverse state)
Note the UP/DOWN input connects Q or /Q to the next stage. This is the same as connecting Qa to Tb OR Invert Qa and send to Tb. (T=JK)
This counter looks much like the one you are working on. Add SET and RESET and LOAD makes it hard to understand.
**broken link removed**
**broken link removed**

 

[tunedwolf]

The SR Latch or Flip Flop comes in 2 flavours, one is just the bare SR latch or SR Flip Flop, the other, the one here in this case, is often called a Gated SR Latch or Gated SR Flip Flop, because the outputs are only activated when the Clock or Trigger is active or, when the "Gate" is opened, so to speak. So you are correct, it is an SR Flip Flop, with a Trigger input, it's just not called that! They are usually built using more basic gate types, either 4 Nand gates or 2 Nand's and 2 Nor's. There is a caveat to using them, however, in that there is a special logic combination that needs to be avoided during operation, which would be all inputs at logic 1. JK Latches or Flip Flops were designed to overcome this little shortcoming. There's also other types of Flip Flop like the D-Type, and in some respects, your counter is very similar in logical terms. There are some good texts on the workings and principles of SR and JK Latches on the web. Welcome to the wonderful world of logic, or not

 

[JimB]

I've decided that the rectangle boxes on the right of the IC scheme are SR Flip Flops and 'T' is a trigger ?? Tell me I've got that wrong too !

SR = Set Reset
T = Toggle rather than Trigger

However, what I was trying to do is to establish the 'why' element, ie. a logic high on input 'UP' will increment the count output

Sometimes it is better (certainly in the short term), not to dig too deeply into the details.
When understanding the operation of transistors, those annoying holes and electrons doing their thing around the PN junctions just confuse the issue when what you really wanted to know was that by making a small current flow into the base, you can make a larger current flow in the collector.

So, consider the 74192 as a black box of magic tricks, but good understanding the actions of the various input and outputs to that box will get the overall circuit application working.
Once you have the feel of the overall operation, then dig inside to see how it works.

To draw a tenuous analogy:
When the original designers of the 74192 started out with a clean sheet of paper, they probably drew a box with input and outputs and then asked "what do we put in the box to do this?", rather than drawing a mass of gates and thinking "what can we make from this lot?"

JimB

 

[shortbus=]

Musicmanager, thank you for asking this question. All of you, thank you for your answers.

 

[Musicmanager]

Hi Guys

Thank you all for the information, not least the time you've given to it and the clarity of the detail, I really appreciate it.

Musicmanager, You picked the hardest counter to understand

Ain't that just typical of me !!?? However, Thanks Ron for the graphic explanation, I will study that again and again until it's etched !!

So you are correct, it is an SR Flip Flop, with a Trigger input, it's just not called that!

I think the reason I arrived at that conclusion which turned out to be correct is that it seems perfectly logical to me, unlike the rest of this logic !

So, consider the 74192 as a black box of magic tricks,

I think that sounds like good advice to me, I've bitten off a bit too much this time !

However, that does mean I have some more work to do in understanding logic gates not least because there are some elements of the countdown timer I want to change and if my understanding is patchy then I'm reliant on you guys again to feed me the answers

Perhaps I should have taken up gardening !!

S

 

[JimB]

I think that sounds like good advice to me, I've bitten off a bit too much this time !

The overall project - maybe is too much, BUT...
break it down into little pieces.

Get a breadboard and set up the 74192.
Don't forget decoupling capacitors on the supplies.
Don't forget pull-up or pull-down resistors where required.
Use LEDs , one on each output*, don't forget the current limiting resistors. Don't worry about driving a 7 seg display yet, get the counter working first.
* Can you count in binary? You will be able to when this is done!

Wire up little push buttons for the Up, Down, Load, Clear inputs.
Wire up a DIL switch for the Data Inputs.

Play with it, see it work.

Now add a 7 seg display.**
Now add a second 74192 counter.**

** Do this in which ever order suits you best.

And so on, build it up bit by bit (see what I said there).
NASA did not just "go to the moon", they tried each part bit by bit and then assembled all the bits.
In a while, when you need an up/down counter for whatever purpose, you will think:
"No problem, done that before, I can do the same again".

Easy.

JimB

 

[alec_t]

One thing you may not be aware of: in the post #2 pic the little circles at the gate/FF inputs/outputs denote logic inversion. In the case of the FF, for example, logic low triggers the FF to toggle, and the FF has two complementary outputs.

 

[Musicmanager]

Hi Jim

Yes, you're quite right, Thanks for that.

My reason for wanting to explore that particular chip was partly based on the fact that it features heavily in the Counter system I got from Eric Gibbs, but also because I want to extend my understanding of logic gates which is very patchy at the moment - limited to reading material and I thought combining the two would achieve my goal. I do realise that there is considerable learning to come before I can build the counter and my thoughts are also taken with the question about loading specific time slots - EG told me some time ago that I would need a good understanding of logic gates to achieve that.

However, I do need to keep my feet on the ground and thank you for helping me do just that !

S

 

[Reloadron]

Wow, this thread grew. I am glad the cartoon was of some help. Chips like the 74192 and 74193 can be pretty useful for programmable up / down counter applications. They are also easily cascaded which makes for nice and once you connect some BCD Thumbwheel Switches to the DCBA inputs it becomes real easy to program the chips. Little by little (with plenty of aspirin) you will gain a good understanding of all these gates and what they do and the associated truth tables.

Ron

 

[KeepItSimpleStupid]

MM:
For boolean logic there are boolean algebra rules too, so A or B is the same as B or A or A NAND B is the same as B NAND A, For IMP, it's not the case. I think you might be missing the noton that the any input can be swapped for NAND and OR and some other gates.

You can tie all of the inputs together and make it a single input and you would have a NOT gate.

Actually all of the gates can be made from NAND gates or NOR Gates only.

You might think of stuff as "Any input will...." and terms of active low and active high.
A and ~A can be considered "A" as active high and active low respectively.

 

[throbscottle]

What a useful question/answers/device! - I should make a turns counter using these! Or do it more simply with a 4026 or 4033, I see now I've bothered to look....

 

[Musicmanager]

LOL
You taken up dancing Throb ? Or perhaps an Impressario ?

S

 

[Musicmanager]

Hi Guys

I've just found a Logic Gates Simulator Free Download at https://www.kolls.net/gatesim/ which is just what I need.

I've published it for the benefit of any other uninitiated plebs like me ! ( To coin a phrase )

S

 

[throbscottle]

Wh? Turns of transformer winding, not me spinning on the spot! (or taking a turn at the mic!)