You add a diode from the output to the plus (+) input which will keep the plus input above the value of the minus input 5V reference after the output goes high, even when the input goes to zero. See the example circuit below.
I made the circuit, except that I used a 28v power source to feed the comparator.
I'm trying to figure out why the output is at 3v before the latching.
What should I change, add to get logic level outputs ?
I simulated your circuit with Electronic Workbench (below) and it looks fine.
Your LM239M model may have a problem. Where did you get it? If you are using LTspice, attach your .asc file (with any added models) and I'll try to simulate it.
EDIT:
I managed to get a good graph by adding a resistor in series to the diode, it was just trail and error.
The simulation is unstable though, if i change R3 to 9k instead of 10k the circuit doesn't work properly.
What the hell is going on ?
(New file uploaded, "Comparator_new")
The circuit in post #3 applies a current limited +28 V back to the 5 V input signal source. Don't know if this is a problem, just pointing it out.
If it is, you can add one transistor or another 239 stage to have the main comparator manipulate its reference input for the latching hysteresis instead of the signal input.
The Zener shows odd behavior. The simulation in Step DC, Start external DC Voltages at zero shows an result for the simulation. A resistor devider of similar voltage at the inverting reference shows operation without the need for Zero volt DC startup in simulation command .Tran
All tho thoughts with an Zener, the Inverting inputs stage may not have anywhere to place current resulting in an floored input (forward biased). Are those not PNP types?
:For some reason my Sim would not open the library file for the LM339: