Hmm.... 'braces'.. At least I now know how to look them up.
No, not working yet though. I think the braces are purely to allow the multiplication operator * (as explained in a second page that braces relates to in the CHM file). but the netlist isn't enough of a .sub file to make LTspice happy. There's a whole load of undefined variables in there that are presumably defined in the circuit shown in that PDF (halfway through file, it contains other short articles).
As far as I can make out from further reading yesterday, I need to build that circuit and label it and convert it to a subcircuit that way. Is this right? Nothing has told me this directly so I need more than just confirmation. I'm deducing that this is the way because I can't imagine any other unless it's possible (and easy) to directly write text based on what I see in that circuit.
EDN being EDN, this thing is probably complete and tells me all the info I need, but is it? I don't know enough to know. If I'm going to work at this I want to know if it is useful work. Is it possible to create working asy and sub files for LTspice based solely on that article?